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From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: <vkoul@kernel.org>, <nm@ti.com>, <ssantosh@kernel.org>,
	<robh+dt@kernel.org>
Cc: <dan.j.williams@intel.com>, <t-kristo@ti.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<dmaengine@vger.kernel.org>, <vigneshr@ti.com>,
	<grygorii.strashko@ti.com>
Subject: [PATCH v3 01/20] dmaengine: ti: k3-udma: Correct normal channel offset when uchan_cnt is not 0
Date: Tue, 8 Dec 2020 11:04:21 +0200	[thread overview]
Message-ID: <20201208090440.31792-2-peter.ujfalusi@ti.com> (raw)
In-Reply-To: <20201208090440.31792-1-peter.ujfalusi@ti.com>

According to different sections of the TRM, the hchan_cnt of CAP3 includes
the number of uchan in UDMA, thus the start offset of the normal channels
are hchan_cnt.

Fixes: daf4ad0499aa4 ("dmaengine: ti: k3-udma: Query throughput level information from hardware")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 drivers/dma/ti/k3-udma.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index e508280b3d70..0e8426dd18a7 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -3199,8 +3199,7 @@ static int udma_setup_resources(struct udma_dev *ud)
 	} else if (UDMA_CAP3_UCHAN_CNT(cap3)) {
 		ud->tpl_levels = 3;
 		ud->tpl_start_idx[1] = UDMA_CAP3_UCHAN_CNT(cap3);
-		ud->tpl_start_idx[0] = ud->tpl_start_idx[1] +
-				       UDMA_CAP3_HCHAN_CNT(cap3);
+		ud->tpl_start_idx[0] = UDMA_CAP3_HCHAN_CNT(cap3);
 	} else if (UDMA_CAP3_HCHAN_CNT(cap3)) {
 		ud->tpl_levels = 2;
 		ud->tpl_start_idx[0] = UDMA_CAP3_HCHAN_CNT(cap3);
-- 
Peter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki


WARNING: multiple messages have this Message-ID (diff)
From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: <vkoul@kernel.org>, <nm@ti.com>, <ssantosh@kernel.org>,
	<robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org, grygorii.strashko@ti.com,
	vigneshr@ti.com, linux-kernel@vger.kernel.org, t-kristo@ti.com,
	dmaengine@vger.kernel.org, dan.j.williams@intel.com,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 01/20] dmaengine: ti: k3-udma: Correct normal channel offset when uchan_cnt is not 0
Date: Tue, 8 Dec 2020 11:04:21 +0200	[thread overview]
Message-ID: <20201208090440.31792-2-peter.ujfalusi@ti.com> (raw)
In-Reply-To: <20201208090440.31792-1-peter.ujfalusi@ti.com>

According to different sections of the TRM, the hchan_cnt of CAP3 includes
the number of uchan in UDMA, thus the start offset of the normal channels
are hchan_cnt.

Fixes: daf4ad0499aa4 ("dmaengine: ti: k3-udma: Query throughput level information from hardware")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 drivers/dma/ti/k3-udma.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index e508280b3d70..0e8426dd18a7 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -3199,8 +3199,7 @@ static int udma_setup_resources(struct udma_dev *ud)
 	} else if (UDMA_CAP3_UCHAN_CNT(cap3)) {
 		ud->tpl_levels = 3;
 		ud->tpl_start_idx[1] = UDMA_CAP3_UCHAN_CNT(cap3);
-		ud->tpl_start_idx[0] = ud->tpl_start_idx[1] +
-				       UDMA_CAP3_HCHAN_CNT(cap3);
+		ud->tpl_start_idx[0] = UDMA_CAP3_HCHAN_CNT(cap3);
 	} else if (UDMA_CAP3_HCHAN_CNT(cap3)) {
 		ud->tpl_levels = 2;
 		ud->tpl_start_idx[0] = UDMA_CAP3_HCHAN_CNT(cap3);
-- 
Peter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki


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  reply	other threads:[~2020-12-08  9:05 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-08  9:04 [PATCH v3 00/20] dmaengine/soc: k3-udma: Add support for BCDMA and PKTDMA Peter Ujfalusi
2020-12-08  9:04 ` Peter Ujfalusi
2020-12-08  9:04 ` Peter Ujfalusi [this message]
2020-12-08  9:04   ` [PATCH v3 01/20] dmaengine: ti: k3-udma: Correct normal channel offset when uchan_cnt is not 0 Peter Ujfalusi
2020-12-08  9:04 ` [PATCH v3 02/20] dmaengine: ti: k3-udma: Wait for peer teardown completion if supported Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08  9:04 ` [PATCH v3 03/20] dmaengine: ti: k3-udma: Add support for second resource range from sysfw Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08  9:04 ` [PATCH v3 04/20] dmaengine: ti: k3-udma-glue: Add function to get device pointer for DMA API Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08 11:52   ` Grygorii Strashko
2020-12-08 11:52     ` Grygorii Strashko
2020-12-08  9:04 ` [PATCH v3 05/20] dmaengine: ti: k3-udma-glue: Get the ringacc from udma_dev Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08 11:52   ` Grygorii Strashko
2020-12-08 11:52     ` Grygorii Strashko
2020-12-08  9:04 ` [PATCH v3 06/20] dmaengine: ti: k3-udma-glue: Configure the dma_dev for rings Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08 11:53   ` Grygorii Strashko
2020-12-08 11:53     ` Grygorii Strashko
2020-12-08  9:04 ` [PATCH v3 07/20] dmaengine: of-dma: Add support for optional router configuration callback Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08  9:04 ` [PATCH v3 08/20] dmaengine: Add support for per channel coherency handling Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08  9:04 ` [PATCH v3 09/20] dmaengine: doc: client: Update for dmaengine_get_dma_device() usage Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08  9:04 ` [PATCH v3 10/20] dmaengine: dmatest: Use dmaengine_get_dma_device Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08  9:04 ` [PATCH v3 11/20] dt-bindings: dma: ti: Add document for K3 BCDMA Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-10 13:59   ` Rob Herring
2020-12-10 13:59     ` Rob Herring
2020-12-08  9:04 ` [PATCH v3 12/20] dt-bindings: dma: ti: Add document for K3 PKTDMA Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-10 14:00   ` Rob Herring
2020-12-10 14:00     ` Rob Herring
2020-12-08  9:04 ` [PATCH v3 13/20] dmaengine: ti: k3-psil: Extend psil_endpoint_config " Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08 11:55   ` Grygorii Strashko
2020-12-08 11:55     ` Grygorii Strashko
2020-12-08  9:04 ` [PATCH v3 14/20] dmaengine: ti: k3-psil: Add initial map for AM64 Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08  9:04 ` [PATCH v3 15/20] dmaengine: ti: Add support for k3 event routers Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08  9:04 ` [PATCH v3 16/20] soc: ti: k3-ringacc: add AM64 DMA rings support Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-11 13:46   ` Peter Ujfalusi
2020-12-11 13:46     ` Peter Ujfalusi
2020-12-08  9:04 ` [PATCH v3 17/20] dmaengine: ti: k3-udma: Initial support for K3 BCDMA Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08  9:04 ` [PATCH v3 18/20] dmaengine: ti: k3-udma: Add support for BCDMA channel TPL handling Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08  9:04 ` [PATCH v3 19/20] dmaengine: ti: k3-udma: Initial support for K3 PKTDMA Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-08  9:04 ` [PATCH v3 20/20] dmaengine: ti: k3-udma-glue: Add " Peter Ujfalusi
2020-12-08  9:04   ` Peter Ujfalusi
2020-12-11 16:24 ` [PATCH v3 00/20] dmaengine/soc: k3-udma: Add support for BCDMA and PKTDMA Vinod Koul
2020-12-11 16:24   ` Vinod Koul
2020-12-11 19:16   ` Peter Ujfalusi
2020-12-11 19:16     ` Peter Ujfalusi
2020-12-12  5:21     ` Vinod Koul
2020-12-12  5:21       ` Vinod Koul

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