From: "Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>
To: Geert Uytterhoeven <geert+renesas@glider.be>, linux-clk@vger.kernel.org
Cc: linux-renesas-soc@vger.kernel.org,
"Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>
Subject: [PATCH 3/5] clk: renesas: r8a77965: Add TMU clocks
Date: Wed, 9 Dec 2020 20:53:41 +0100 [thread overview]
Message-ID: <20201209195343.803120-4-niklas.soderlund+renesas@ragnatech.se> (raw)
In-Reply-To: <20201209195343.803120-1-niklas.soderlund+renesas@ragnatech.se>
This patch adds TMU{0,1,2,3,4} clocks.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
drivers/clk/renesas/r8a77965-cpg-mssr.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index 2b55a06ac5cf238f..46a157732759c394 100644
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -123,6 +123,11 @@ static const struct cpg_core_clk r8a77965_core_clks[] __initconst = {
static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
DEF_MOD("fdp1-0", 119, R8A77965_CLK_S0D1),
+ DEF_MOD("tmu4", 121, R8A77965_CLK_S0D6),
+ DEF_MOD("tmu3", 122, R8A77965_CLK_S3D2),
+ DEF_MOD("tmu2", 123, R8A77965_CLK_S3D2),
+ DEF_MOD("tmu1", 124, R8A77965_CLK_S3D2),
+ DEF_MOD("tmu0", 125, R8A77965_CLK_CP),
DEF_MOD("scif5", 202, R8A77965_CLK_S3D4),
DEF_MOD("scif4", 203, R8A77965_CLK_S3D4),
DEF_MOD("scif3", 204, R8A77965_CLK_S3D4),
--
2.29.2
next prev parent reply other threads:[~2020-12-09 19:54 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-09 19:53 [PATCH 0/5] clk: renesas: Add TMU clocks Niklas Söderlund
2020-12-09 19:53 ` [PATCH 1/5] clk: renesas: r8a7795: " Niklas Söderlund
2020-12-10 12:32 ` Geert Uytterhoeven
2020-12-09 19:53 ` [PATCH 2/5] clk: renesas: r8a7796: " Niklas Söderlund
2020-12-10 12:34 ` Geert Uytterhoeven
2020-12-09 19:53 ` Niklas Söderlund [this message]
2020-12-10 12:35 ` [PATCH 3/5] clk: renesas: r8a77965: " Geert Uytterhoeven
2020-12-09 19:53 ` [PATCH 4/5] clk: renesas: r8a77990: " Niklas Söderlund
2020-12-10 12:36 ` Geert Uytterhoeven
2020-12-09 19:53 ` [PATCH 5/5] clk: renesas: r8a77995: " Niklas Söderlund
2020-12-10 12:41 ` Geert Uytterhoeven
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