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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: David Hildenbrand <david@redhat.com>
Subject: [PATCH 03/16] tcg/s390x: Merge TCG_AREG0 and TCG_REG_CALL_STACK into TCGReg
Date: Fri, 25 Dec 2020 12:19:43 -0800	[thread overview]
Message-ID: <20201225201956.692861-4-richard.henderson@linaro.org> (raw)
In-Reply-To: <20201225201956.692861-1-richard.henderson@linaro.org>

They are rightly values in the same enumeration.

Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/s390x/tcg-target.h | 28 +++++++---------------------
 1 file changed, 7 insertions(+), 21 deletions(-)

diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h
index 264c8c1e97..a78a2c4398 100644
--- a/tcg/s390x/tcg-target.h
+++ b/tcg/s390x/tcg-target.h
@@ -29,22 +29,13 @@
 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 19
 
 typedef enum TCGReg {
-    TCG_REG_R0 = 0,
-    TCG_REG_R1,
-    TCG_REG_R2,
-    TCG_REG_R3,
-    TCG_REG_R4,
-    TCG_REG_R5,
-    TCG_REG_R6,
-    TCG_REG_R7,
-    TCG_REG_R8,
-    TCG_REG_R9,
-    TCG_REG_R10,
-    TCG_REG_R11,
-    TCG_REG_R12,
-    TCG_REG_R13,
-    TCG_REG_R14,
-    TCG_REG_R15
+    TCG_REG_R0,  TCG_REG_R1,  TCG_REG_R2,  TCG_REG_R3,
+    TCG_REG_R4,  TCG_REG_R5,  TCG_REG_R6,  TCG_REG_R7,
+    TCG_REG_R8,  TCG_REG_R9,  TCG_REG_R10, TCG_REG_R11,
+    TCG_REG_R12, TCG_REG_R13, TCG_REG_R14, TCG_REG_R15,
+
+    TCG_AREG0 = TCG_REG_R10,
+    TCG_REG_CALL_STACK = TCG_REG_R15
 } TCGReg;
 
 #define TCG_TARGET_NB_REGS 16
@@ -135,7 +126,6 @@ extern uint64_t s390_facilities[1];
 #define TCG_TARGET_HAS_mulsh_i64      0
 
 /* used for function call generation */
-#define TCG_REG_CALL_STACK		TCG_REG_R15
 #define TCG_TARGET_STACK_ALIGN		8
 #define TCG_TARGET_CALL_STACK_OFFSET	160
 
@@ -144,10 +134,6 @@ extern uint64_t s390_facilities[1];
 
 #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
 
-enum {
-    TCG_AREG0 = TCG_REG_R10,
-};
-
 static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
 {
 }
-- 
2.25.1



  parent reply	other threads:[~2020-12-25 20:26 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-25 20:19 [PATCH 00/16] tcg/s390x: host vector support Richard Henderson
2020-12-25 20:19 ` [PATCH 01/16] tcg/s390x: Rename from tcg/s390 Richard Henderson
2020-12-27 15:20   ` Philippe Mathieu-Daudé
2021-01-02  8:43   ` Thomas Huth
2020-12-25 20:19 ` [PATCH 02/16] tcg/s390x: Change FACILITY representation Richard Henderson
2020-12-27 15:25   ` Philippe Mathieu-Daudé
2020-12-25 20:19 ` Richard Henderson [this message]
2020-12-27 15:25   ` [PATCH 03/16] tcg/s390x: Merge TCG_AREG0 and TCG_REG_CALL_STACK into TCGReg Philippe Mathieu-Daudé
2020-12-25 20:19 ` [PATCH 04/16] tcg/s390x: Add host vector framework Richard Henderson
2020-12-25 20:19 ` [PATCH 05/16] tcg/s390x: Implement tcg_out_ld/st for vector types Richard Henderson
2020-12-25 20:19 ` [PATCH 06/16] tcg/s390x: Implement tcg_out_mov " Richard Henderson
2020-12-25 20:19 ` [PATCH 07/16] tcg/s390x: Implement tcg_out_dup*_vec Richard Henderson
2020-12-25 20:19 ` [PATCH 08/16] tcg/s390x: Implement minimal vector operations Richard Henderson
2020-12-25 20:19 ` [PATCH 09/16] tcg/s390x: Implement andc, orc, abs, neg, not " Richard Henderson
2020-12-25 20:19 ` [PATCH 10/16] tcg/s390x: Implement TCG_TARGET_HAS_mul_vec Richard Henderson
2020-12-25 20:19 ` [PATCH 11/16] tcg/s390x: Implement vector shift operations Richard Henderson
2020-12-25 20:19 ` [PATCH 12/16] tcg/s390x: Implement TCG_TARGET_HAS_minmax_vec Richard Henderson
2020-12-25 20:19 ` [PATCH 13/16] tcg: Expand usadd/ussub with umin/umax Richard Henderson
2020-12-25 20:19 ` [PATCH 14/16] tcg/s390x: Implement TCG_TARGET_HAS_sat_vec Richard Henderson
2020-12-25 20:19 ` [PATCH 15/16] tcg/s390x: Implement TCG_TARGET_HAS_bitsel_vec Richard Henderson
2020-12-25 20:19 ` [PATCH 16/16] tcg/s390x: Implement TCG_TARGET_HAS_cmpsel_vec Richard Henderson

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