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From: Roger Lu <roger.lu@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Enric Balletbo Serra <eballetbo@gmail.com>,
	Kevin Hilman <khilman@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Nicolas Boichat <drinkcat@google.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: Fan Chen <fan.chen@mediatek.com>,
	HenryC Chen <HenryC.Chen@mediatek.com>,
	YT Lee <yt.lee@mediatek.com>,
	Xiaoqing Liu <Xiaoqing.Liu@mediatek.com>,
	Charles Yang <Charles.Yang@mediatek.com>,
	Angus Lin <Angus.Lin@mediatek.com>,
	Mark Rutland <mark.rutland@arm.com>, Nishanth Menon <nm@ti.com>,
	Roger Lu <roger.lu@mediatek.com>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-pm@vger.kernel.org>
Subject: [PATCH v10 1/7] [v10,1/7]: dt-bindings: soc: mediatek: add mtk svs dt-bindings
Date: Sun, 27 Dec 2020 18:54:43 +0800	[thread overview]
Message-ID: <20201227105449.11452-2-roger.lu@mediatek.com> (raw)
In-Reply-To: <20201227105449.11452-1-roger.lu@mediatek.com>

Document the binding for enabling mtk svs on MediaTek SoC.

Signed-off-by: Roger Lu <roger.lu@mediatek.com>
---
 .../bindings/soc/mediatek/mtk-svs.yaml        | 75 +++++++++++++++++++
 1 file changed, 75 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml

diff --git a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
new file mode 100644
index 000000000000..9c7da0acd82f
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/mediatek/mtk-svs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Introduce MTK SVS engine
+
+maintainers:
+  - Matthias Brugger <matthias.bgg@gmail.com>
+  - Kevin Hilman <khilman@kernel.org>
+  - Nishanth Menon <nm@ti.com>
+
+description: |+
+  The Smart Voltage Scaling(SVS) engine is a piece of hardware
+  which has several controllers(banks) for calculating suitable
+  voltage to different power domains(CPU/GPU/CCI) according to
+  chip process corner, temperatures and other factors. Then DVFS
+  driver could apply SVS bank voltage to PMIC/Buck.
+
+properties:
+  compatible:
+    enum:
+      - mediatek,mt8183-svs
+
+  reg:
+    description: Address range of the MTK SVS controller.
+    maxItems: 1
+
+  interrupts:
+    description: IRQ for the MTK SVS controller.
+    maxItems: 1
+
+  clocks:
+    description: Main clock for MTK SVS controller to work.
+
+  clock-names:
+    const: main
+
+  nvmem-cells:
+    maxItems: 2
+    description:
+      Phandle to the calibration data provided by a nvmem device.
+
+  nvmem-cell-names:
+    items:
+      - const: svs-calibration-data
+      - const: t-calibration-data
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - nvmem-cells
+  - nvmem-cell-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/mt8183-clk.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    svs: svs@1100b000 {
+        compatible = "mediatek,mt8183-svs";
+        reg = <0 0x1100b000 0 0x1000>;
+        interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
+        clocks = <&infracfg CLK_INFRA_THERM>;
+        clock-names = "main";
+        nvmem-cells = <&svs_calibration>, <&thermal_calibration>;
+        nvmem-cell-names = "svs-calibration-data", "t-calibration-data";
+    };
-- 
2.18.0


WARNING: multiple messages have this Message-ID (diff)
From: Roger Lu <roger.lu@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Enric Balletbo Serra <eballetbo@gmail.com>,
	Kevin Hilman <khilman@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Nicolas Boichat <drinkcat@google.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>, Nishanth Menon <nm@ti.com>,
	Angus Lin <Angus.Lin@mediatek.com>,
	devicetree@vger.kernel.org, linux-pm@vger.kernel.org,
	Roger Lu <roger.lu@mediatek.com>,
	linux-kernel@vger.kernel.org,
	Xiaoqing Liu <Xiaoqing.Liu@mediatek.com>,
	YT Lee <yt.lee@mediatek.com>, Fan Chen <fan.chen@mediatek.com>,
	linux-mediatek@lists.infradead.org,
	HenryC Chen <HenryC.Chen@mediatek.com>,
	Charles Yang <Charles.Yang@mediatek.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v10 1/7] [v10, 1/7]: dt-bindings: soc: mediatek: add mtk svs dt-bindings
Date: Sun, 27 Dec 2020 18:54:43 +0800	[thread overview]
Message-ID: <20201227105449.11452-2-roger.lu@mediatek.com> (raw)
In-Reply-To: <20201227105449.11452-1-roger.lu@mediatek.com>

Document the binding for enabling mtk svs on MediaTek SoC.

Signed-off-by: Roger Lu <roger.lu@mediatek.com>
---
 .../bindings/soc/mediatek/mtk-svs.yaml        | 75 +++++++++++++++++++
 1 file changed, 75 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml

diff --git a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
new file mode 100644
index 000000000000..9c7da0acd82f
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/mediatek/mtk-svs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Introduce MTK SVS engine
+
+maintainers:
+  - Matthias Brugger <matthias.bgg@gmail.com>
+  - Kevin Hilman <khilman@kernel.org>
+  - Nishanth Menon <nm@ti.com>
+
+description: |+
+  The Smart Voltage Scaling(SVS) engine is a piece of hardware
+  which has several controllers(banks) for calculating suitable
+  voltage to different power domains(CPU/GPU/CCI) according to
+  chip process corner, temperatures and other factors. Then DVFS
+  driver could apply SVS bank voltage to PMIC/Buck.
+
+properties:
+  compatible:
+    enum:
+      - mediatek,mt8183-svs
+
+  reg:
+    description: Address range of the MTK SVS controller.
+    maxItems: 1
+
+  interrupts:
+    description: IRQ for the MTK SVS controller.
+    maxItems: 1
+
+  clocks:
+    description: Main clock for MTK SVS controller to work.
+
+  clock-names:
+    const: main
+
+  nvmem-cells:
+    maxItems: 2
+    description:
+      Phandle to the calibration data provided by a nvmem device.
+
+  nvmem-cell-names:
+    items:
+      - const: svs-calibration-data
+      - const: t-calibration-data
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - nvmem-cells
+  - nvmem-cell-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/mt8183-clk.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    svs: svs@1100b000 {
+        compatible = "mediatek,mt8183-svs";
+        reg = <0 0x1100b000 0 0x1000>;
+        interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
+        clocks = <&infracfg CLK_INFRA_THERM>;
+        clock-names = "main";
+        nvmem-cells = <&svs_calibration>, <&thermal_calibration>;
+        nvmem-cell-names = "svs-calibration-data", "t-calibration-data";
+    };
-- 
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Roger Lu <roger.lu@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Enric Balletbo Serra <eballetbo@gmail.com>,
	Kevin Hilman <khilman@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Nicolas Boichat <drinkcat@google.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>, Nishanth Menon <nm@ti.com>,
	Angus Lin <Angus.Lin@mediatek.com>,
	devicetree@vger.kernel.org, linux-pm@vger.kernel.org,
	Roger Lu <roger.lu@mediatek.com>,
	linux-kernel@vger.kernel.org,
	Xiaoqing Liu <Xiaoqing.Liu@mediatek.com>,
	YT Lee <yt.lee@mediatek.com>, Fan Chen <fan.chen@mediatek.com>,
	linux-mediatek@lists.infradead.org,
	HenryC Chen <HenryC.Chen@mediatek.com>,
	Charles Yang <Charles.Yang@mediatek.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v10 1/7] [v10, 1/7]: dt-bindings: soc: mediatek: add mtk svs dt-bindings
Date: Sun, 27 Dec 2020 18:54:43 +0800	[thread overview]
Message-ID: <20201227105449.11452-2-roger.lu@mediatek.com> (raw)
In-Reply-To: <20201227105449.11452-1-roger.lu@mediatek.com>

Document the binding for enabling mtk svs on MediaTek SoC.

Signed-off-by: Roger Lu <roger.lu@mediatek.com>
---
 .../bindings/soc/mediatek/mtk-svs.yaml        | 75 +++++++++++++++++++
 1 file changed, 75 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml

diff --git a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
new file mode 100644
index 000000000000..9c7da0acd82f
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/mediatek/mtk-svs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Introduce MTK SVS engine
+
+maintainers:
+  - Matthias Brugger <matthias.bgg@gmail.com>
+  - Kevin Hilman <khilman@kernel.org>
+  - Nishanth Menon <nm@ti.com>
+
+description: |+
+  The Smart Voltage Scaling(SVS) engine is a piece of hardware
+  which has several controllers(banks) for calculating suitable
+  voltage to different power domains(CPU/GPU/CCI) according to
+  chip process corner, temperatures and other factors. Then DVFS
+  driver could apply SVS bank voltage to PMIC/Buck.
+
+properties:
+  compatible:
+    enum:
+      - mediatek,mt8183-svs
+
+  reg:
+    description: Address range of the MTK SVS controller.
+    maxItems: 1
+
+  interrupts:
+    description: IRQ for the MTK SVS controller.
+    maxItems: 1
+
+  clocks:
+    description: Main clock for MTK SVS controller to work.
+
+  clock-names:
+    const: main
+
+  nvmem-cells:
+    maxItems: 2
+    description:
+      Phandle to the calibration data provided by a nvmem device.
+
+  nvmem-cell-names:
+    items:
+      - const: svs-calibration-data
+      - const: t-calibration-data
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - nvmem-cells
+  - nvmem-cell-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/mt8183-clk.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    svs: svs@1100b000 {
+        compatible = "mediatek,mt8183-svs";
+        reg = <0 0x1100b000 0 0x1000>;
+        interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
+        clocks = <&infracfg CLK_INFRA_THERM>;
+        clock-names = "main";
+        nvmem-cells = <&svs_calibration>, <&thermal_calibration>;
+        nvmem-cell-names = "svs-calibration-data", "t-calibration-data";
+    };
-- 
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-12-27 10:57 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-27 10:54 [PATCH v10 0/7] soc: mediatek: SVS: introduce MTK SVS engine Roger Lu
2020-12-27 10:54 ` Roger Lu
2020-12-27 10:54 ` Roger Lu
2020-12-27 10:54 ` Roger Lu [this message]
2020-12-27 10:54   ` [PATCH v10 1/7] [v10, 1/7]: dt-bindings: soc: mediatek: add mtk svs dt-bindings Roger Lu
2020-12-27 10:54   ` Roger Lu
2020-12-27 16:56   ` Rob Herring
2020-12-27 16:56     ` Rob Herring
2020-12-27 16:56     ` Rob Herring
2020-12-31 18:12   ` [PATCH v10 1/7] [v10,1/7]: " Rob Herring
2020-12-31 18:12     ` Rob Herring
2020-12-31 18:12     ` Rob Herring
2020-12-27 10:54 ` [PATCH v10 2/7] [v10,2/7]: arm64: dts: mt8183: add svs device information Roger Lu
2020-12-27 10:54   ` [PATCH v10 2/7] [v10, 2/7]: " Roger Lu
2020-12-27 10:54   ` Roger Lu
2020-12-27 10:54 ` [PATCH v10 3/7] [v10,3/7]: soc: mediatek: SVS: introduce MTK SVS engine Roger Lu
2020-12-27 10:54   ` [PATCH v10 3/7] [v10, 3/7]: " Roger Lu
2020-12-27 10:54   ` Roger Lu
2020-12-31  2:10   ` Nicolas Boichat
2020-12-31  2:10     ` Nicolas Boichat
2020-12-31  2:10     ` Nicolas Boichat
2021-01-04  8:51     ` Roger Lu
2021-01-04  8:51       ` Roger Lu
2021-01-04  9:27       ` Nicolas Boichat
2021-01-04  9:27         ` Nicolas Boichat
2021-01-04  9:27         ` Nicolas Boichat
2021-01-04  9:52         ` Roger Lu
2021-01-04  9:52           ` Roger Lu
2021-01-04  9:52           ` Roger Lu
2021-01-06  8:41       ` Roger Lu
2021-01-06  8:41         ` Roger Lu
2021-01-06  8:41         ` Roger Lu
2021-01-06  8:44         ` Nicolas Boichat
2021-01-06  8:44           ` Nicolas Boichat
2021-01-06  8:44           ` Nicolas Boichat
2020-12-27 10:54 ` [PATCH v10 4/7] [v10,4/7]: soc: mediatek: SVS: add debug commands Roger Lu
2020-12-27 10:54   ` Roger Lu
2020-12-27 10:54   ` Roger Lu
2020-12-27 10:54 ` [PATCH v10 5/7] [v10,5/7]: dt-bindings: soc: mediatek: add mt8192 svs dt-bindings Roger Lu
2020-12-27 10:54   ` [PATCH v10 5/7] [v10, 5/7]: " Roger Lu
2020-12-27 10:54   ` Roger Lu
2020-12-27 10:54 ` [PATCH v10 6/7] [v10,6/7]: arm64: dts: mt8192: add svs device information Roger Lu
2020-12-27 10:54   ` [PATCH v10 6/7] [v10, 6/7]: " Roger Lu
2020-12-27 10:54   ` Roger Lu
2020-12-27 10:54 ` [PATCH v10 7/7] [v10,7/7]: soc: mediatek: SVS: add mt8192 SVS GPU driver Roger Lu
2020-12-27 10:54   ` [PATCH v10 7/7] [v10, 7/7]: " Roger Lu
2020-12-27 10:54   ` Roger Lu

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