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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: linux-remoteproc@vger.kernel.org, linux-amlogic@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	bjorn.andersson@linaro.org, ohad@wizery.com, robh+dt@kernel.org,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Subject: [PATCH 2/5] dt-bindings: Amlogic: add the documentation for the SECBUS2 registers
Date: Wed, 30 Dec 2020 02:27:21 +0100	[thread overview]
Message-ID: <20201230012724.1326156-3-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20201230012724.1326156-1-martin.blumenstingl@googlemail.com>

The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which
contains registers for various IP blocks such as pin-controller bits for
the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits.
The registers can be accessed directly when not running in "secure mode".
When "secure mode" is enabled then these registers have to be accessed
through secure monitor calls.

So far these SoCs are always known to boot in "non-secure mode".
Add a binding documentation using syscon (as these registers are shared
across different IPs) for the SECBUS2 registers.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 .../arm/amlogic/amlogic,meson-mx-secbus2.yaml | 53 +++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml

diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml
new file mode 100644
index 000000000000..cfa8e9de6c28
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface
+
+maintainers:
+  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+
+description: |
+  The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which
+  contains registers for various IP blocks such as pin-controller bits for
+  the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits.
+  The registers can be accessed directly when not running in "secure mode".
+  When "secure mode" is enabled then these registers have to be accessed
+  through secure monitor calls.
+
+# We need a select here so we don't match all nodes with 'syscon'
+select:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - amlogic,meson8-secbus2
+          - amlogic,meson8b-secbus2
+  required:
+    - compatible
+
+properties:
+  compatible:
+    items:
+      - enum:
+        - amlogic,meson8-secbus2
+        - amlogic,meson8b-secbus2
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    secbus2: system-controller@4000 {
+      compatible = "amlogic,meson8-secbus2", "syscon";
+      reg = <0x4000 0x2000>;
+    };
-- 
2.30.0


WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: linux-remoteproc@vger.kernel.org, linux-amlogic@lists.infradead.org
Cc: ohad@wizery.com, devicetree@vger.kernel.org,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	linux-kernel@vger.kernel.org, bjorn.andersson@linaro.org,
	robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/5] dt-bindings: Amlogic: add the documentation for the SECBUS2 registers
Date: Wed, 30 Dec 2020 02:27:21 +0100	[thread overview]
Message-ID: <20201230012724.1326156-3-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20201230012724.1326156-1-martin.blumenstingl@googlemail.com>

The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which
contains registers for various IP blocks such as pin-controller bits for
the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits.
The registers can be accessed directly when not running in "secure mode".
When "secure mode" is enabled then these registers have to be accessed
through secure monitor calls.

So far these SoCs are always known to boot in "non-secure mode".
Add a binding documentation using syscon (as these registers are shared
across different IPs) for the SECBUS2 registers.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 .../arm/amlogic/amlogic,meson-mx-secbus2.yaml | 53 +++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml

diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml
new file mode 100644
index 000000000000..cfa8e9de6c28
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface
+
+maintainers:
+  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+
+description: |
+  The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which
+  contains registers for various IP blocks such as pin-controller bits for
+  the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits.
+  The registers can be accessed directly when not running in "secure mode".
+  When "secure mode" is enabled then these registers have to be accessed
+  through secure monitor calls.
+
+# We need a select here so we don't match all nodes with 'syscon'
+select:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - amlogic,meson8-secbus2
+          - amlogic,meson8b-secbus2
+  required:
+    - compatible
+
+properties:
+  compatible:
+    items:
+      - enum:
+        - amlogic,meson8-secbus2
+        - amlogic,meson8b-secbus2
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    secbus2: system-controller@4000 {
+      compatible = "amlogic,meson8-secbus2", "syscon";
+      reg = <0x4000 0x2000>;
+    };
-- 
2.30.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: linux-remoteproc@vger.kernel.org, linux-amlogic@lists.infradead.org
Cc: ohad@wizery.com, devicetree@vger.kernel.org,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	linux-kernel@vger.kernel.org, bjorn.andersson@linaro.org,
	robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/5] dt-bindings: Amlogic: add the documentation for the SECBUS2 registers
Date: Wed, 30 Dec 2020 02:27:21 +0100	[thread overview]
Message-ID: <20201230012724.1326156-3-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20201230012724.1326156-1-martin.blumenstingl@googlemail.com>

The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which
contains registers for various IP blocks such as pin-controller bits for
the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits.
The registers can be accessed directly when not running in "secure mode".
When "secure mode" is enabled then these registers have to be accessed
through secure monitor calls.

So far these SoCs are always known to boot in "non-secure mode".
Add a binding documentation using syscon (as these registers are shared
across different IPs) for the SECBUS2 registers.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 .../arm/amlogic/amlogic,meson-mx-secbus2.yaml | 53 +++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml

diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml
new file mode 100644
index 000000000000..cfa8e9de6c28
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface
+
+maintainers:
+  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+
+description: |
+  The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which
+  contains registers for various IP blocks such as pin-controller bits for
+  the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits.
+  The registers can be accessed directly when not running in "secure mode".
+  When "secure mode" is enabled then these registers have to be accessed
+  through secure monitor calls.
+
+# We need a select here so we don't match all nodes with 'syscon'
+select:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - amlogic,meson8-secbus2
+          - amlogic,meson8b-secbus2
+  required:
+    - compatible
+
+properties:
+  compatible:
+    items:
+      - enum:
+        - amlogic,meson8-secbus2
+        - amlogic,meson8b-secbus2
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    secbus2: system-controller@4000 {
+      compatible = "amlogic,meson8-secbus2", "syscon";
+      reg = <0x4000 0x2000>;
+    };
-- 
2.30.0


_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

  parent reply	other threads:[~2020-12-30  1:28 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-30  1:27 [PATCH 0/5] Amlogic Meson Always-On ARC remote-processor support Martin Blumenstingl
2020-12-30  1:27 ` Martin Blumenstingl
2020-12-30  1:27 ` Martin Blumenstingl
2020-12-30  1:27 ` [PATCH 1/5] dt-bindings: sram: Add compatible strings for the Meson AO ARC SRAM Martin Blumenstingl
2020-12-30  1:27   ` Martin Blumenstingl
2020-12-30  1:27   ` Martin Blumenstingl
2020-12-30  1:27 ` Martin Blumenstingl [this message]
2020-12-30  1:27   ` [PATCH 2/5] dt-bindings: Amlogic: add the documentation for the SECBUS2 registers Martin Blumenstingl
2020-12-30  1:27   ` Martin Blumenstingl
2020-12-31 15:34   ` Rob Herring
2020-12-31 15:34     ` Rob Herring
2020-12-31 15:34     ` Rob Herring
2020-12-31 18:14   ` Rob Herring
2020-12-31 18:14     ` Rob Herring
2020-12-31 18:14     ` Rob Herring
2020-12-30  1:27 ` [PATCH 3/5] dt-bindings: remoteproc: Add the documentation for Meson AO ARC rproc Martin Blumenstingl
2020-12-30  1:27   ` Martin Blumenstingl
2020-12-30  1:27   ` Martin Blumenstingl
2020-12-31 15:34   ` Rob Herring
2020-12-31 15:34     ` Rob Herring
2020-12-31 15:34     ` Rob Herring
2021-03-18  2:55   ` Bjorn Andersson
2021-03-18  2:55     ` Bjorn Andersson
2021-03-18  2:55     ` Bjorn Andersson
2021-03-23 22:02     ` Martin Blumenstingl
2021-03-23 22:02       ` Martin Blumenstingl
2021-03-23 22:02       ` Martin Blumenstingl
2021-04-13 20:59       ` Bjorn Andersson
2021-04-13 20:59         ` Bjorn Andersson
2021-04-13 20:59         ` Bjorn Andersson
2021-04-27 19:03         ` Martin Blumenstingl
2021-04-27 19:03           ` Martin Blumenstingl
2021-04-27 19:03           ` Martin Blumenstingl
2020-12-30  1:27 ` [PATCH 4/5] remoteproc: meson-mx-ao-arc: Add a driver for the AO ARC remote procesor Martin Blumenstingl
2020-12-30  1:27   ` Martin Blumenstingl
2020-12-30  1:27   ` Martin Blumenstingl
2021-03-18  2:51   ` Bjorn Andersson
2021-03-18  2:51     ` Bjorn Andersson
2021-03-18  2:51     ` Bjorn Andersson
2021-03-23 21:36     ` Martin Blumenstingl
2021-03-23 21:36       ` Martin Blumenstingl
2021-03-23 21:36       ` Martin Blumenstingl
2020-12-30  1:27 ` [PATCH 5/5] ARM: dts: meson: add the AO ARC remote processor Martin Blumenstingl
2020-12-30  1:27   ` Martin Blumenstingl
2020-12-30  1:27   ` Martin Blumenstingl

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