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From: Andre Przywara <andre.przywara@arm.com>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Rob Herring <robh@kernel.org>
Cc: Jernej Skrabec <jernej.skrabec@siol.net>,
	Icenowy Zheng <icenowy@aosc.io>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-sunxi@googlegroups.com
Subject: [PATCH 4/7] arm64: dts: allwinner: H6: Allow up to 150 MHz MMC bus frequency
Date: Wed,  6 Jan 2021 15:05:22 +0000	[thread overview]
Message-ID: <20210106150525.15403-5-andre.przywara@arm.com> (raw)
In-Reply-To: <20210106150525.15403-1-andre.przywara@arm.com>

The H6 manual explicitly lists a frequency limit of 150 MHz for the bus
frequency of the MMC controllers. So far we had no explicit limits in the
DT, which limited eMMC to a rather conservative 52 MHz.

Put those maximum frequencies in the SoC .dtsi, to allow higher speed
modes (which still would need to be explicitly enabled, per board).

Tested with an eMMC using HS-200 on a Pine H64. Running at the spec'ed
200 MHz indeed fails with I/O errors, but 150 MHz seems to work stably.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index f593cfeaecc9..77765d4a05ec 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -436,6 +436,7 @@
 			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins>;
+			max-frequency = <150000000>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -452,6 +453,7 @@
 			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc1_pins>;
+			max-frequency = <150000000>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -468,6 +470,7 @@
 			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc2_pins>;
+			max-frequency = <150000000>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.17.5


WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org,
	Jernej Skrabec <jernej.skrabec@siol.net>,
	linux-sunxi@googlegroups.com,
	linux-arm-kernel@lists.infradead.org,
	Icenowy Zheng <icenowy@aosc.io>
Subject: [PATCH 4/7] arm64: dts: allwinner: H6: Allow up to 150 MHz MMC bus frequency
Date: Wed,  6 Jan 2021 15:05:22 +0000	[thread overview]
Message-ID: <20210106150525.15403-5-andre.przywara@arm.com> (raw)
In-Reply-To: <20210106150525.15403-1-andre.przywara@arm.com>

The H6 manual explicitly lists a frequency limit of 150 MHz for the bus
frequency of the MMC controllers. So far we had no explicit limits in the
DT, which limited eMMC to a rather conservative 52 MHz.

Put those maximum frequencies in the SoC .dtsi, to allow higher speed
modes (which still would need to be explicitly enabled, per board).

Tested with an eMMC using HS-200 on a Pine H64. Running at the spec'ed
200 MHz indeed fails with I/O errors, but 150 MHz seems to work stably.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index f593cfeaecc9..77765d4a05ec 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -436,6 +436,7 @@
 			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins>;
+			max-frequency = <150000000>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -452,6 +453,7 @@
 			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc1_pins>;
+			max-frequency = <150000000>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -468,6 +470,7 @@
 			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc2_pins>;
+			max-frequency = <150000000>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.17.5


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  parent reply	other threads:[~2021-01-06 15:06 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-06 15:05 [PATCH 0/7] arm64: dts: allwinner: Various DT fixes Andre Przywara
2021-01-06 15:05 ` Andre Przywara
2021-01-06 15:05 ` [PATCH 1/7] arm64: dts: allwinner: H6/A64: properly connect USB PHY to port 0 Andre Przywara
2021-01-06 15:05   ` Andre Przywara
2021-01-06 15:56   ` [linux-sunxi] " Chen-Yu Tsai
2021-01-06 15:56     ` Chen-Yu Tsai
2021-01-13 10:30     ` André Przywara
2021-01-13 10:30       ` André Przywara
2021-01-13 10:43       ` Chen-Yu Tsai
2021-01-13 10:43         ` Chen-Yu Tsai
2021-01-06 15:05 ` [PATCH 2/7] arm64: dts: allwinner: Pine64-LTS: Add status LED Andre Przywara
2021-01-06 15:05   ` Andre Przywara
2021-01-06 15:53   ` [linux-sunxi] " Chen-Yu Tsai
2021-01-06 15:53     ` Chen-Yu Tsai
2021-01-06 16:08     ` André Przywara
2021-01-06 16:08       ` André Przywara
2021-01-13 14:02       ` Emmanuel Vadot
2021-01-13 14:02         ` Emmanuel Vadot
2021-01-06 16:01   ` Maxime Ripard
2021-01-06 16:01     ` Maxime Ripard
2021-01-06 15:05 ` [PATCH 3/7] arm64: dts: allwinner: Drop non-removable from SoPine/LTS SD card Andre Przywara
2021-01-06 15:05   ` Andre Przywara
2021-01-06 15:57   ` [linux-sunxi] " Chen-Yu Tsai
2021-01-06 15:57     ` Chen-Yu Tsai
2021-01-06 15:05 ` Andre Przywara [this message]
2021-01-06 15:05   ` [PATCH 4/7] arm64: dts: allwinner: H6: Allow up to 150 MHz MMC bus frequency Andre Przywara
2021-01-06 16:01   ` [linux-sunxi] " Chen-Yu Tsai
2021-01-06 16:01     ` Chen-Yu Tsai
2021-01-06 15:05 ` [PATCH 5/7] arm64: dts: allwinner: A64: Limit MMC2 bus frequency to 150 MHz Andre Przywara
2021-01-06 15:05   ` Andre Przywara
2021-01-06 15:58   ` [linux-sunxi] " Chen-Yu Tsai
2021-01-06 15:58     ` Chen-Yu Tsai
2021-01-06 15:05 ` [PATCH 6/7] arm64: dts: allwinner: Pine64-LTS/SoPine: Enable HS200 eMMC mode Andre Przywara
2021-01-06 15:05   ` Andre Przywara
2021-01-06 15:59   ` [linux-sunxi] " Chen-Yu Tsai
2021-01-06 15:59     ` Chen-Yu Tsai
2021-01-06 15:05 ` [PATCH 7/7] arm64: dts: allwinner: Pine H64: " Andre Przywara
2021-01-06 15:05   ` Andre Przywara
2021-01-06 16:00   ` [linux-sunxi] " Chen-Yu Tsai
2021-01-06 16:00     ` Chen-Yu Tsai

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