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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [CI 2/7] drm/i915/selftests: Skip unstable timing measurements
Date: Fri,  8 Jan 2021 20:40:21 +0000	[thread overview]
Message-ID: <20210108204026.20682-2-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20210108204026.20682-1-chris@chris-wilson.co.uk>

If any of the perf tests run into 0 time, not only are we liable to
divide by zero, but the result would be highly questionable.
Nevertheless, let's not have a div-by-zero error.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@intel.com>
---
 .../drm/i915/selftests/intel_memory_region.c  | 20 +++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/intel_memory_region.c b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
index 75839db63bea..ce7adfa3bca0 100644
--- a/drivers/gpu/drm/i915/selftests/intel_memory_region.c
+++ b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
@@ -852,14 +852,22 @@ static int _perf_memcpy(struct intel_memory_region *src_mr,
 		}
 
 		sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL);
+		if (t[0] <= 0) {
+			/* ignore the impossible to protect our sanity */
+			pr_debug("Skipping %s src(%s, %s) -> dst(%s, %s) %14s %4lluKiB copy, unstable measurement [%lld, %lld]\n",
+				 __func__,
+				 src_mr->name, repr_type(src_type),
+				 dst_mr->name, repr_type(dst_type),
+				 tests[i].name, size >> 10,
+				 t[0], t[4]);
+			continue;
+		}
+
 		pr_info("%s src(%s, %s) -> dst(%s, %s) %14s %4llu KiB copy: %5lld MiB/s\n",
 			__func__,
-			src_mr->name,
-			repr_type(src_type),
-			dst_mr->name,
-			repr_type(dst_type),
-			tests[i].name,
-			size >> 10,
+			src_mr->name, repr_type(src_type),
+			dst_mr->name, repr_type(dst_type),
+			tests[i].name, size >> 10,
 			div64_u64(mul_u32_u32(4 * size,
 					      1000 * 1000 * 1000),
 				  t[1] + 2 * t[2] + t[3]) >> 20);
-- 
2.20.1

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  reply	other threads:[~2021-01-08 20:40 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-08 20:40 [Intel-gfx] [CI 1/7] drm/i915/gt: Prevent use of engine->wa_ctx after error Chris Wilson
2021-01-08 20:40 ` Chris Wilson [this message]
2021-01-08 20:40 ` [Intel-gfx] [CI 3/7] drm/i915/selftests: Rearrange ktime_get to reduce latency against CS Chris Wilson
2021-01-08 20:40 ` [Intel-gfx] [CI 4/7] drm/i915/gt: Restore ce->signal flush before releasing virtual engine Chris Wilson
2021-01-08 20:40 ` [Intel-gfx] [CI 5/7] drm/i915/gt: Only retire on the last breadcrumb if the last request Chris Wilson
2021-01-08 20:40 ` [Intel-gfx] [CI 6/7] drm/i915/gt: Only disable preemption on gen8 render engines Chris Wilson
2021-01-08 20:40 ` [Intel-gfx] [CI 7/7] drm/i915/gt: Disable arbitration on no-preempt requests Chris Wilson
2021-01-08 21:06 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/7] drm/i915/gt: Prevent use of engine->wa_ctx after error Patchwork
2021-01-08 21:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-08 21:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-09  4:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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