From: Suzuki K Poulose <suzuki.poulose@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: coresight@lists.linaro.org, mathieu.poirier@linaro.org, anshuman.khandual@arm.com, mike.leach@linaro.org, leo.yan@linaro.org, linux-kernel@vger.kernel.org, jonathan.zhouwen@huawei.com, catalin.marinas@arm.com, Suzuki K Poulose <suzuki.poulose@arm.com>, Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>, Tingwei Zhang <tingwei@codeaurora.org> Subject: [PATCH v7 02/28] coresight: etm4x: Skip accessing TRCPDCR in save/restore Date: Sun, 10 Jan 2021 22:48:24 +0000 [thread overview] Message-ID: <20210110224850.1880240-3-suzuki.poulose@arm.com> (raw) In-Reply-To: <20210110224850.1880240-1-suzuki.poulose@arm.com> When the ETM is affected by Qualcomm errata, modifying the TRCPDCR could cause the system hang. Even though this is taken care of during enable/disable ETM, the ETM state save/restore could still access the TRCPDCR. Make sure we skip the access during the save/restore. Found by code inspection. Fixes: 02510a5aa78df45 ("coresight: etm4x: Add support to skip trace unit power up") Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Cc: Tingwei Zhang <tingwei@codeaurora.org> Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> --- drivers/hwtracing/coresight/coresight-etm4x-core.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 76526679b998..cce65fc0c9aa 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -1373,7 +1373,8 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) state->trcclaimset = readl(drvdata->base + TRCCLAIMCLR); - state->trcpdcr = readl(drvdata->base + TRCPDCR); + if (!drvdata->skip_power_up) + state->trcpdcr = readl(drvdata->base + TRCPDCR); /* wait for TRCSTATR.IDLE to go up */ if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1)) { @@ -1391,9 +1392,9 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) * potentially save power on systems that respect the TRCPDCR_PU * despite requesting software to save/restore state. */ - writel_relaxed((state->trcpdcr & ~TRCPDCR_PU), - drvdata->base + TRCPDCR); - + if (!drvdata->skip_power_up) + writel_relaxed((state->trcpdcr & ~TRCPDCR_PU), + drvdata->base + TRCPDCR); out: CS_LOCK(drvdata->base); return ret; @@ -1488,7 +1489,8 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) writel_relaxed(state->trcclaimset, drvdata->base + TRCCLAIMSET); - writel_relaxed(state->trcpdcr, drvdata->base + TRCPDCR); + if (!drvdata->skip_power_up) + writel_relaxed(state->trcpdcr, drvdata->base + TRCPDCR); drvdata->state_needs_restore = false; -- 2.24.1
WARNING: multiple messages have this Message-ID (diff)
From: Suzuki K Poulose <suzuki.poulose@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>, mathieu.poirier@linaro.org, anshuman.khandual@arm.com, catalin.marinas@arm.com, coresight@lists.linaro.org, Suzuki K Poulose <suzuki.poulose@arm.com>, linux-kernel@vger.kernel.org, Tingwei Zhang <tingwei@codeaurora.org>, leo.yan@linaro.org, jonathan.zhouwen@huawei.com, mike.leach@linaro.org Subject: [PATCH v7 02/28] coresight: etm4x: Skip accessing TRCPDCR in save/restore Date: Sun, 10 Jan 2021 22:48:24 +0000 [thread overview] Message-ID: <20210110224850.1880240-3-suzuki.poulose@arm.com> (raw) In-Reply-To: <20210110224850.1880240-1-suzuki.poulose@arm.com> When the ETM is affected by Qualcomm errata, modifying the TRCPDCR could cause the system hang. Even though this is taken care of during enable/disable ETM, the ETM state save/restore could still access the TRCPDCR. Make sure we skip the access during the save/restore. Found by code inspection. Fixes: 02510a5aa78df45 ("coresight: etm4x: Add support to skip trace unit power up") Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Cc: Tingwei Zhang <tingwei@codeaurora.org> Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> --- drivers/hwtracing/coresight/coresight-etm4x-core.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 76526679b998..cce65fc0c9aa 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -1373,7 +1373,8 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) state->trcclaimset = readl(drvdata->base + TRCCLAIMCLR); - state->trcpdcr = readl(drvdata->base + TRCPDCR); + if (!drvdata->skip_power_up) + state->trcpdcr = readl(drvdata->base + TRCPDCR); /* wait for TRCSTATR.IDLE to go up */ if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1)) { @@ -1391,9 +1392,9 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) * potentially save power on systems that respect the TRCPDCR_PU * despite requesting software to save/restore state. */ - writel_relaxed((state->trcpdcr & ~TRCPDCR_PU), - drvdata->base + TRCPDCR); - + if (!drvdata->skip_power_up) + writel_relaxed((state->trcpdcr & ~TRCPDCR_PU), + drvdata->base + TRCPDCR); out: CS_LOCK(drvdata->base); return ret; @@ -1488,7 +1489,8 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) writel_relaxed(state->trcclaimset, drvdata->base + TRCCLAIMSET); - writel_relaxed(state->trcpdcr, drvdata->base + TRCPDCR); + if (!drvdata->skip_power_up) + writel_relaxed(state->trcpdcr, drvdata->base + TRCPDCR); drvdata->state_needs_restore = false; -- 2.24.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-01-10 22:50 UTC|newest] Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-10 22:48 [PATCH v7 00/28] coresight: etm4x: Support for system instructions Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 01/28] coresight: etm4x: Handle access to TRCSSPCICRn Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose [this message] 2021-01-10 22:48 ` [PATCH v7 02/28] coresight: etm4x: Skip accessing TRCPDCR in save/restore Suzuki K Poulose 2021-01-25 18:39 ` Mathieu Poirier 2021-01-25 18:39 ` Mathieu Poirier 2021-01-10 22:48 ` [PATCH v7 03/28] coresight: Introduce device access abstraction Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-25 18:42 ` Mathieu Poirier 2021-01-25 18:42 ` Mathieu Poirier 2021-01-10 22:48 ` [PATCH v7 04/28] coresight: tpiu: Prepare for using coresight " Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 05/28] coresight: Convert coresight_timeout to use " Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 06/28] coresight: Convert claim/disclaim operations to use access wrappers Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 07/28] coresight: etm4x: Always read the registers on the host CPU Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 08/28] coresight: etm4x: Convert all register accesses Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 09/28] coresight: etm4x: Make offset available for sysfs attributes Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 10/28] coresight: etm4x: Add commentary on the registers Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 11/28] coresight: etm4x: Add sysreg access helpers Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 12/28] coresight: etm4x: Hide sysfs attributes for unavailable registers Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 13/28] coresight: etm4x: Define DEVARCH register fields Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 14/28] coresight: etm4x: Check for Software Lock Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 15/28] coresight: etm4x: Cleanup secure exception level masks Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 16/28] coresight: etm4x: Clean up " Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 17/28] coresight: etm4x: Handle ETM architecture version Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 18/28] coresight: etm4x: Detect access early on the target CPU Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 19/28] coresight: etm4x: Use TRCDEVARCH for component discovery Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 20/28] coresight: etm4x: Expose trcdevarch via sysfs Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 21/28] coresight: etm4x: Add necessary synchronization for sysreg access Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 22/28] coresight: etm4x: Detect system instructions support Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 23/28] coresight: etm4x: Refactor probing routine Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 24/28] coresight: etm4x: Run arch feature detection on the CPU Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 25/28] coresight: etm4x: Add support for sysreg only devices Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 26/28] dts: bindings: coresight: ETM system register access only units Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 27/28] arm64: Add TRFCR_ELx definitions Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-01-10 22:48 ` [PATCH v7 28/28] coresight: Add support for v8.4 SelfHosted tracing Suzuki K Poulose 2021-01-10 22:48 ` Suzuki K Poulose 2021-02-12 10:34 ` Mike Leach 2021-02-12 10:34 ` Mike Leach 2021-02-12 15:36 ` Suzuki K Poulose 2021-02-12 15:36 ` Suzuki K Poulose 2021-02-12 17:30 ` Mike Leach 2021-02-12 17:30 ` Mike Leach 2021-02-18 14:51 ` Suzuki K Poulose 2021-02-18 14:51 ` Suzuki K Poulose 2021-01-25 18:49 ` [PATCH v7 00/28] coresight: etm4x: Support for system instructions Mathieu Poirier 2021-01-25 18:49 ` Mathieu Poirier 2021-01-25 22:05 ` Suzuki K Poulose 2021-01-25 22:05 ` Suzuki K Poulose
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