From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Thomas Huth" <thuth@redhat.com>,
"Huacai Chen" <chenhuacai@kernel.org>,
qemu-riscv@nongnu.org, "Stefan Weil" <sw@weilnetz.de>,
"Cornelia Huck" <cohuck@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
qemu-s390x@nongnu.org, qemu-arm@nongnu.org,
"Alistair Francis" <Alistair.Francis@wdc.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Miroslav Rezanina" <mrezanin@redhat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH v2 6/6] tcg: Restrict tcg_out_vec_op() to arrays of TCG_MAX_OP_ARGS elements
Date: Wed, 13 Jan 2021 18:24:59 +0100 [thread overview]
Message-ID: <20210113172459.2481060-7-f4bug@amsat.org> (raw)
In-Reply-To: <20210113172459.2481060-1-f4bug@amsat.org>
tcg_reg_alloc_op() allocates arrays of TCG_MAX_OP_ARGS elements.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
tcg/tcg.c | 14 ++++++++------
tcg/aarch64/tcg-target.c.inc | 3 ++-
tcg/i386/tcg-target.c.inc | 3 ++-
tcg/ppc/tcg-target.c.inc | 3 ++-
4 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 97d074d8fab..3a20327f9cb 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -120,9 +120,10 @@ static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece,
TCGReg dst, TCGReg base, intptr_t offset);
static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
TCGReg dst, tcg_target_long arg);
-static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, unsigned vecl,
- unsigned vece, const TCGArg *args,
- const int *const_args);
+static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
+ unsigned vecl, unsigned vece,
+ const TCGArg args[TCG_MAX_OP_ARGS],
+ const int const_args[TCG_MAX_OP_ARGS]);
#else
static inline bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece,
TCGReg dst, TCGReg src)
@@ -139,9 +140,10 @@ static inline void tcg_out_dupi_vec(TCGContext *s, TCGType type,
{
g_assert_not_reached();
}
-static inline void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, unsigned vecl,
- unsigned vece, const TCGArg *args,
- const int *const_args)
+static inline void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
+ unsigned vecl, unsigned vece,
+ const TCGArg args[TCG_MAX_OP_ARGS],
+ const int const_args[TCG_MAX_OP_ARGS])
{
g_assert_not_reached();
}
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index ab199b143f3..32811976e78 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -2276,7 +2276,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
unsigned vecl, unsigned vece,
- const TCGArg *args, const int *const_args)
+ const TCGArg args[TCG_MAX_OP_ARGS],
+ const int const_args[TCG_MAX_OP_ARGS])
{
static const AArch64Insn cmp_insn[16] = {
[TCG_COND_EQ] = I3616_CMEQ,
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index d121dca8789..87bf75735a1 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -2654,7 +2654,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
unsigned vecl, unsigned vece,
- const TCGArg *args, const int *const_args)
+ const TCGArg args[TCG_MAX_OP_ARGS],
+ const int const_args[TCG_MAX_OP_ARGS])
{
static int const add_insn[4] = {
OPC_PADDB, OPC_PADDW, OPC_PADDD, OPC_PADDQ
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index 70b747a8a30..b8f5f8a53e1 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -3137,7 +3137,8 @@ static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece,
static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
unsigned vecl, unsigned vece,
- const TCGArg *args, const int *const_args)
+ const TCGArg args[TCG_MAX_OP_ARGS],
+ const int const_args[TCG_MAX_OP_ARGS])
{
static const uint32_t
add_op[4] = { VADDUBM, VADDUHM, VADDUWM, VADDUDM },
--
2.26.2
WARNING: multiple messages have this Message-ID (diff)
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aurelien Jarno" <aurelien@aurel32.net>,
"Cornelia Huck" <cohuck@redhat.com>,
qemu-arm@nongnu.org,
"Alistair Francis" <Alistair.Francis@wdc.com>,
"Miroslav Rezanina" <mrezanin@redhat.com>,
"Thomas Huth" <thuth@redhat.com>,
qemu-riscv@nongnu.org, "Huacai Chen" <chenhuacai@kernel.org>,
"Stefan Weil" <sw@weilnetz.de>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Andrzej Zaborowski" <balrogg@gmail.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
qemu-s390x@nongnu.org, "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>
Subject: [PATCH v2 6/6] tcg: Restrict tcg_out_vec_op() to arrays of TCG_MAX_OP_ARGS elements
Date: Wed, 13 Jan 2021 18:24:59 +0100 [thread overview]
Message-ID: <20210113172459.2481060-7-f4bug@amsat.org> (raw)
In-Reply-To: <20210113172459.2481060-1-f4bug@amsat.org>
tcg_reg_alloc_op() allocates arrays of TCG_MAX_OP_ARGS elements.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
tcg/tcg.c | 14 ++++++++------
tcg/aarch64/tcg-target.c.inc | 3 ++-
tcg/i386/tcg-target.c.inc | 3 ++-
tcg/ppc/tcg-target.c.inc | 3 ++-
4 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 97d074d8fab..3a20327f9cb 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -120,9 +120,10 @@ static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece,
TCGReg dst, TCGReg base, intptr_t offset);
static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
TCGReg dst, tcg_target_long arg);
-static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, unsigned vecl,
- unsigned vece, const TCGArg *args,
- const int *const_args);
+static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
+ unsigned vecl, unsigned vece,
+ const TCGArg args[TCG_MAX_OP_ARGS],
+ const int const_args[TCG_MAX_OP_ARGS]);
#else
static inline bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece,
TCGReg dst, TCGReg src)
@@ -139,9 +140,10 @@ static inline void tcg_out_dupi_vec(TCGContext *s, TCGType type,
{
g_assert_not_reached();
}
-static inline void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, unsigned vecl,
- unsigned vece, const TCGArg *args,
- const int *const_args)
+static inline void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
+ unsigned vecl, unsigned vece,
+ const TCGArg args[TCG_MAX_OP_ARGS],
+ const int const_args[TCG_MAX_OP_ARGS])
{
g_assert_not_reached();
}
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index ab199b143f3..32811976e78 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -2276,7 +2276,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
unsigned vecl, unsigned vece,
- const TCGArg *args, const int *const_args)
+ const TCGArg args[TCG_MAX_OP_ARGS],
+ const int const_args[TCG_MAX_OP_ARGS])
{
static const AArch64Insn cmp_insn[16] = {
[TCG_COND_EQ] = I3616_CMEQ,
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index d121dca8789..87bf75735a1 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -2654,7 +2654,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
unsigned vecl, unsigned vece,
- const TCGArg *args, const int *const_args)
+ const TCGArg args[TCG_MAX_OP_ARGS],
+ const int const_args[TCG_MAX_OP_ARGS])
{
static int const add_insn[4] = {
OPC_PADDB, OPC_PADDW, OPC_PADDD, OPC_PADDQ
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index 70b747a8a30..b8f5f8a53e1 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -3137,7 +3137,8 @@ static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece,
static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
unsigned vecl, unsigned vece,
- const TCGArg *args, const int *const_args)
+ const TCGArg args[TCG_MAX_OP_ARGS],
+ const int const_args[TCG_MAX_OP_ARGS])
{
static const uint32_t
add_op[4] = { VADDUBM, VADDUHM, VADDUWM, VADDUDM },
--
2.26.2
next prev parent reply other threads:[~2021-01-13 17:37 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-13 17:24 [PATCH v2 0/6] tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements Philippe Mathieu-Daudé
2021-01-13 17:24 ` Philippe Mathieu-Daudé
2021-01-13 17:24 ` [PATCH v2 1/6] tcg/arm: Hoist common argument loads in tcg_out_op() Philippe Mathieu-Daudé
2021-01-13 17:24 ` Philippe Mathieu-Daudé
2021-01-13 17:24 ` [PATCH v2 2/6] tcg/arm: Replace goto statement by fall through comment Philippe Mathieu-Daudé
2021-01-13 17:24 ` Philippe Mathieu-Daudé
2021-01-13 17:24 ` [PATCH v2 3/6] tcg/ppc: Hoist common argument loads in tcg_out_op() Philippe Mathieu-Daudé
2021-01-13 17:24 ` Philippe Mathieu-Daudé
2021-01-14 0:28 ` Richard Henderson
2021-01-14 0:28 ` Richard Henderson
2021-01-14 9:59 ` Philippe Mathieu-Daudé
2021-01-14 9:59 ` Philippe Mathieu-Daudé
2021-01-13 17:24 ` [PATCH v2 4/6] tcg/s390: " Philippe Mathieu-Daudé
2021-01-13 17:24 ` Philippe Mathieu-Daudé
2021-01-13 17:24 ` [PATCH v2 5/6] tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements Philippe Mathieu-Daudé
2021-01-13 17:24 ` Philippe Mathieu-Daudé
2021-01-13 17:24 ` Philippe Mathieu-Daudé [this message]
2021-01-13 17:24 ` [PATCH v2 6/6] tcg: Restrict tcg_out_vec_op() " Philippe Mathieu-Daudé
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