All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Chia-Wei, Wang" <chiawei_wang@aspeedtech.com>
To: <robh+dt@kernel.org>, <lee.jones@linaro.org>, <joel@jms.id.au>,
	<andrew@aj.id.au>, <linus.walleij@linaro.org>, <minyard@acm.org>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
	<openbmc@lists.ozlabs.org>
Cc: <BMC-SW@aspeedtech.com>, <haiyue.wang@linux.intel.com>,
	<cyrilbur@gmail.com>, <rlippert@google.com>
Subject: [PATCH v5 4/5] pinctrl: aspeed-g5: Adapt to new LPC device tree layout
Date: Thu, 14 Jan 2021 21:16:21 +0800	[thread overview]
Message-ID: <20210114131622.8951-5-chiawei_wang@aspeedtech.com> (raw)
In-Reply-To: <20210114131622.8951-1-chiawei_wang@aspeedtech.com>

Add check against LPC device v2 compatible string to
ensure that the fixed device tree layout is adopted.
The LPC register offsets are also fixed accordingly.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
---
 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
index 0cab4c2576e2..996ebcba4d38 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
@@ -60,7 +60,7 @@
 #define COND2		{ ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 0, 0 }
 
 /* LHCR0 is offset from the end of the H8S/2168-compatible registers */
-#define LHCR0		0x20
+#define LHCR0		0xa0
 #define GFX064		0x64
 
 #define B14 0
@@ -2648,14 +2648,19 @@ static struct regmap *aspeed_g5_acquire_regmap(struct aspeed_pinmux_data *ctx,
 	}
 
 	if (ip == ASPEED_IP_LPC) {
-		struct device_node *node;
+		struct device_node *np;
 		struct regmap *map;
 
-		node = of_parse_phandle(ctx->dev->of_node,
+		np = of_parse_phandle(ctx->dev->of_node,
 					"aspeed,external-nodes", 1);
-		if (node) {
-			map = syscon_node_to_regmap(node->parent);
-			of_node_put(node);
+		if (np) {
+			if (!of_device_is_compatible(np->parent, "aspeed,ast2400-lpc-v2") &&
+			    !of_device_is_compatible(np->parent, "aspeed,ast2500-lpc-v2") &&
+			    !of_device_is_compatible(np->parent, "aspeed,ast2600-lpc-v2"))
+				return ERR_PTR(-ENODEV);
+
+			map = syscon_node_to_regmap(np->parent);
+			of_node_put(np);
 			if (IS_ERR(map))
 				return map;
 		} else
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: "Chia-Wei, Wang" <chiawei_wang@aspeedtech.com>
To: <robh+dt@kernel.org>, <lee.jones@linaro.org>, <joel@jms.id.au>,
	<andrew@aj.id.au>, <linus.walleij@linaro.org>, <minyard@acm.org>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
	<openbmc@lists.ozlabs.org>
Cc: BMC-SW@aspeedtech.com, cyrilbur@gmail.com, haiyue.wang@linux.intel.com
Subject: [PATCH v5 4/5] pinctrl: aspeed-g5: Adapt to new LPC device tree layout
Date: Thu, 14 Jan 2021 21:16:21 +0800	[thread overview]
Message-ID: <20210114131622.8951-5-chiawei_wang@aspeedtech.com> (raw)
In-Reply-To: <20210114131622.8951-1-chiawei_wang@aspeedtech.com>

Add check against LPC device v2 compatible string to
ensure that the fixed device tree layout is adopted.
The LPC register offsets are also fixed accordingly.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
---
 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
index 0cab4c2576e2..996ebcba4d38 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
@@ -60,7 +60,7 @@
 #define COND2		{ ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 0, 0 }
 
 /* LHCR0 is offset from the end of the H8S/2168-compatible registers */
-#define LHCR0		0x20
+#define LHCR0		0xa0
 #define GFX064		0x64
 
 #define B14 0
@@ -2648,14 +2648,19 @@ static struct regmap *aspeed_g5_acquire_regmap(struct aspeed_pinmux_data *ctx,
 	}
 
 	if (ip == ASPEED_IP_LPC) {
-		struct device_node *node;
+		struct device_node *np;
 		struct regmap *map;
 
-		node = of_parse_phandle(ctx->dev->of_node,
+		np = of_parse_phandle(ctx->dev->of_node,
 					"aspeed,external-nodes", 1);
-		if (node) {
-			map = syscon_node_to_regmap(node->parent);
-			of_node_put(node);
+		if (np) {
+			if (!of_device_is_compatible(np->parent, "aspeed,ast2400-lpc-v2") &&
+			    !of_device_is_compatible(np->parent, "aspeed,ast2500-lpc-v2") &&
+			    !of_device_is_compatible(np->parent, "aspeed,ast2600-lpc-v2"))
+				return ERR_PTR(-ENODEV);
+
+			map = syscon_node_to_regmap(np->parent);
+			of_node_put(np);
 			if (IS_ERR(map))
 				return map;
 		} else
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: "Chia-Wei, Wang" <chiawei_wang@aspeedtech.com>
To: <robh+dt@kernel.org>, <lee.jones@linaro.org>, <joel@jms.id.au>,
	<andrew@aj.id.au>, <linus.walleij@linaro.org>, <minyard@acm.org>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
	<openbmc@lists.ozlabs.org>
Cc: BMC-SW@aspeedtech.com, cyrilbur@gmail.com,
	haiyue.wang@linux.intel.com, rlippert@google.com
Subject: [PATCH v5 4/5] pinctrl: aspeed-g5: Adapt to new LPC device tree layout
Date: Thu, 14 Jan 2021 21:16:21 +0800	[thread overview]
Message-ID: <20210114131622.8951-5-chiawei_wang@aspeedtech.com> (raw)
In-Reply-To: <20210114131622.8951-1-chiawei_wang@aspeedtech.com>

Add check against LPC device v2 compatible string to
ensure that the fixed device tree layout is adopted.
The LPC register offsets are also fixed accordingly.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
---
 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
index 0cab4c2576e2..996ebcba4d38 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
@@ -60,7 +60,7 @@
 #define COND2		{ ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 0, 0 }
 
 /* LHCR0 is offset from the end of the H8S/2168-compatible registers */
-#define LHCR0		0x20
+#define LHCR0		0xa0
 #define GFX064		0x64
 
 #define B14 0
@@ -2648,14 +2648,19 @@ static struct regmap *aspeed_g5_acquire_regmap(struct aspeed_pinmux_data *ctx,
 	}
 
 	if (ip == ASPEED_IP_LPC) {
-		struct device_node *node;
+		struct device_node *np;
 		struct regmap *map;
 
-		node = of_parse_phandle(ctx->dev->of_node,
+		np = of_parse_phandle(ctx->dev->of_node,
 					"aspeed,external-nodes", 1);
-		if (node) {
-			map = syscon_node_to_regmap(node->parent);
-			of_node_put(node);
+		if (np) {
+			if (!of_device_is_compatible(np->parent, "aspeed,ast2400-lpc-v2") &&
+			    !of_device_is_compatible(np->parent, "aspeed,ast2500-lpc-v2") &&
+			    !of_device_is_compatible(np->parent, "aspeed,ast2600-lpc-v2"))
+				return ERR_PTR(-ENODEV);
+
+			map = syscon_node_to_regmap(np->parent);
+			of_node_put(np);
 			if (IS_ERR(map))
 				return map;
 		} else
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-01-14 13:17 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-14 13:16 [PATCH v5 0/5] Remove LPC register partitioning Chia-Wei, Wang
2021-01-14 13:16 ` Chia-Wei, Wang
2021-01-14 13:16 ` Chia-Wei, Wang
2021-01-14 13:16 ` [PATCH v5 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning Chia-Wei, Wang
2021-01-14 13:16   ` Chia-Wei, Wang
2021-01-14 13:16   ` Chia-Wei, Wang
2021-01-20  4:57   ` Andrew Jeffery
2021-01-20  4:57     ` Andrew Jeffery
2021-01-20  4:57     ` Andrew Jeffery
2021-01-25 21:25   ` Rob Herring
2021-01-25 21:25     ` Rob Herring
2021-01-25 21:25     ` Rob Herring
2021-01-27  0:24   ` Andrew Jeffery
2021-01-27  0:24     ` Andrew Jeffery
2021-01-27  0:24     ` Andrew Jeffery
2021-02-17  7:40     ` ChiaWei Wang
2021-02-17  7:40       ` ChiaWei Wang
2021-02-17  7:40       ` ChiaWei Wang
2021-02-17  7:44       ` Joel Stanley
2021-02-17  7:44         ` Joel Stanley
2021-02-17  7:44         ` Joel Stanley
2021-02-17  8:04         ` ChiaWei Wang
2021-02-17  8:04           ` ChiaWei Wang
2021-02-17  8:04           ` ChiaWei Wang
2021-02-17  8:04         ` Andrew Jeffery
2021-02-17  8:04           ` Andrew Jeffery
2021-02-17  8:04           ` Andrew Jeffery
2021-01-14 13:16 ` [PATCH v5 2/5] ARM: dts: Remove LPC BMC and Host partitions Chia-Wei, Wang
2021-01-14 13:16   ` Chia-Wei, Wang
2021-01-14 13:16   ` Chia-Wei, Wang
2021-01-20  5:01   ` Andrew Jeffery
2021-01-20  5:01     ` Andrew Jeffery
2021-01-20  5:01     ` Andrew Jeffery
2021-01-25  4:12   ` Andrew Jeffery
2021-01-25  4:12     ` Andrew Jeffery
2021-01-25  4:12     ` Andrew Jeffery
2021-01-14 13:16 ` [PATCH v5 3/5] ipmi: kcs: aspeed: Adapt to new LPC DTS layout Chia-Wei, Wang
2021-01-14 13:16   ` Chia-Wei, Wang
2021-01-14 13:16   ` Chia-Wei, Wang
2021-01-20  5:02   ` Andrew Jeffery
2021-01-20  5:02     ` Andrew Jeffery
2021-01-20  5:02     ` Andrew Jeffery
2021-01-22  9:55     ` ChiaWei Wang
2021-01-22  9:55       ` ChiaWei Wang
2021-01-22  9:55       ` ChiaWei Wang
2021-01-22 15:31       ` Corey Minyard
2021-01-22 15:31         ` Corey Minyard
2021-01-22 15:31         ` Corey Minyard
2021-01-14 13:16 ` Chia-Wei, Wang [this message]
2021-01-14 13:16   ` [PATCH v5 4/5] pinctrl: aspeed-g5: Adapt to new LPC device tree layout Chia-Wei, Wang
2021-01-14 13:16   ` Chia-Wei, Wang
2021-01-18 14:59   ` Linus Walleij
2021-01-18 14:59     ` Linus Walleij
2021-01-18 14:59     ` Linus Walleij
2021-01-20  5:03   ` Andrew Jeffery
2021-01-20  5:03     ` Andrew Jeffery
2021-01-20  5:03     ` Andrew Jeffery
2021-01-25  4:14   ` Andrew Jeffery
2021-01-25  4:14     ` Andrew Jeffery
2021-01-25  4:14     ` Andrew Jeffery
2021-01-14 13:16 ` [PATCH v5 5/5] soc: aspeed: " Chia-Wei, Wang
2021-01-14 13:16   ` Chia-Wei, Wang
2021-01-14 13:16   ` Chia-Wei, Wang
2021-01-20  5:10   ` Andrew Jeffery
2021-01-20  5:10     ` Andrew Jeffery
2021-01-20  5:10     ` Andrew Jeffery
2021-01-25  4:15   ` Andrew Jeffery
2021-01-25  4:15     ` Andrew Jeffery
2021-01-25  4:15     ` Andrew Jeffery
2021-01-26  5:51 ` [PATCH v5 0/5] Remove LPC register partitioning ChiaWei Wang
2021-01-26  5:51   ` ChiaWei Wang
2021-01-26  5:51   ` ChiaWei Wang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210114131622.8951-5-chiawei_wang@aspeedtech.com \
    --to=chiawei_wang@aspeedtech.com \
    --cc=BMC-SW@aspeedtech.com \
    --cc=andrew@aj.id.au \
    --cc=cyrilbur@gmail.com \
    --cc=devicetree@vger.kernel.org \
    --cc=haiyue.wang@linux.intel.com \
    --cc=joel@jms.id.au \
    --cc=lee.jones@linaro.org \
    --cc=linus.walleij@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-aspeed@lists.ozlabs.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=minyard@acm.org \
    --cc=openbmc@lists.ozlabs.org \
    --cc=rlippert@google.com \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.