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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PATCH v2 04/22] tcg/arm: Split out target constraints to tcg-target-con-str.h
Date: Fri, 15 Jan 2021 11:04:38 -1000	[thread overview]
Message-ID: <20210115210456.1053477-5-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210115210456.1053477-1-richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/arm/tcg-target-con-str.h | 22 ++++++++++++
 tcg/arm/tcg-target.h         |  1 +
 tcg/arm/tcg-target.c.inc     | 69 +++++++-----------------------------
 3 files changed, 36 insertions(+), 56 deletions(-)
 create mode 100644 tcg/arm/tcg-target-con-str.h

diff --git a/tcg/arm/tcg-target-con-str.h b/tcg/arm/tcg-target-con-str.h
new file mode 100644
index 0000000000..2451ec6c7f
--- /dev/null
+++ b/tcg/arm/tcg-target-con-str.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Define Arm target-specific operand constraint.
+ * Copyright (c) 2021 Linaro
+ */
+
+/*
+ * Define constraint letters for register sets:
+ * REGS(letter, register_mask)
+ */
+REGS('r', ALL_GENERAL_REGS)
+REGS('l', ALL_QLOAD_REGS)
+REGS('s', ALL_QSTORE_REGS)
+
+/*
+ * Define constraint letters for constants:
+ * CONST(letter, TCG_CT_CONST_* bit set)
+ */
+CONST('I', TCG_CT_CONST_ARM)
+CONST('K', TCG_CT_CONST_INV)
+CONST('N', TCG_CT_CONST_NEG)
+CONST('Z', TCG_CT_CONST_ZERO)
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 8d1fee6327..16336cd545 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -142,5 +142,6 @@ void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t);
 #define TCG_TARGET_NEED_LDST_LABELS
 #endif
 #define TCG_TARGET_NEED_POOL_LABELS
+#define TCG_TARGET_CON_STR_H
 
 #endif
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index c2b26b3c45..e1a247b27f 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -237,65 +237,22 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
 #define TCG_CT_CONST_NEG  0x400
 #define TCG_CT_CONST_ZERO 0x800
 
-/* parse target specific constraints */
-static const char *target_parse_constraint(TCGArgConstraint *ct,
-                                           const char *ct_str, TCGType type)
-{
-    switch (*ct_str++) {
-    case 'I':
-        ct->ct |= TCG_CT_CONST_ARM;
-        break;
-    case 'K':
-        ct->ct |= TCG_CT_CONST_INV;
-        break;
-    case 'N': /* The gcc constraint letter is L, already used here.  */
-        ct->ct |= TCG_CT_CONST_NEG;
-        break;
-    case 'Z':
-        ct->ct |= TCG_CT_CONST_ZERO;
-        break;
+#define ALL_GENERAL_REGS  0xffffu
 
-    case 'r':
-        ct->regs = 0xffff;
-        break;
-
-    /* qemu_ld address */
-    case 'l':
-        ct->regs = 0xffff;
 #ifdef CONFIG_SOFTMMU
-        /* r0-r2,lr will be overwritten when reading the tlb entry,
-           so don't use these. */
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R0);
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R1);
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R2);
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R3);
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R14);
+#define ALL_QLOAD_REGS \
+    (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \
+                          (1 << TCG_REG_R2) | (1 << TCG_REG_R3) | \
+                          (1 << TCG_REG_R14)))
+#define ALL_QSTORE_REGS \
+    (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \
+                          (1 << TCG_REG_R2) | (1 << TCG_REG_R14) | \
+                          ((TARGET_LONG_BITS == 64) << TCG_REG_R3)))
+#else
+#define ALL_QLOAD_REGS   ALL_GENERAL_REGS
+#define ALL_QSTORE_REGS \
+    (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1)))
 #endif
-        break;
-
-    /* qemu_st address & data */
-    case 's':
-        ct->regs = 0xffff;
-        /* r0-r2 will be overwritten when reading the tlb entry (softmmu only)
-           and r0-r1 doing the byte swapping, so don't use these. */
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R0);
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R1);
-#if defined(CONFIG_SOFTMMU)
-        /* Avoid clashes with registers being used for helper args */
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R2);
-#if TARGET_LONG_BITS == 64
-        /* Avoid clashes with registers being used for helper args */
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R3);
-#endif
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R14);
-#endif
-        break;
-
-    default:
-        return NULL;
-    }
-    return ct_str;
-}
 
 static inline uint32_t rotl(uint32_t val, int n)
 {
-- 
2.25.1



  parent reply	other threads:[~2021-01-15 21:10 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-15 21:04 [PATCH v2 00/22] tcg: backend constraints cleanup Richard Henderson
2021-01-15 21:04 ` [PATCH v2 01/22] tcg/tci: Drop L and S constraints Richard Henderson
2021-01-19 14:23   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 02/22] tcg/i386: Move constraint type check to tcg_target_const_match Richard Henderson
2021-01-19 14:27   ` Peter Maydell
2021-01-19 19:19     ` Richard Henderson
2021-01-15 21:04 ` [PATCH v2 03/22] tcg/i386: Split out target constraints to tcg-target-con-str.h Richard Henderson
2021-01-19 14:38   ` Peter Maydell
2021-01-19 17:46     ` Richard Henderson
2021-01-19 18:07       ` Peter Maydell
2021-01-15 21:04 ` Richard Henderson [this message]
2021-01-19 14:42   ` [PATCH v2 04/22] tcg/arm: " Peter Maydell
2021-01-15 21:04 ` [PATCH v2 05/22] tcg/aarch64: " Richard Henderson
2021-01-19 14:44   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 06/22] tcg/ppc: " Richard Henderson
2021-01-19 14:47   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 07/22] tcg/tci: " Richard Henderson
2021-01-19 14:47   ` Peter Maydell
2021-01-19 22:19   ` Philippe Mathieu-Daudé
2021-01-15 21:04 ` [PATCH v2 08/22] tcg/mips: " Richard Henderson
2021-01-19 14:50   ` Peter Maydell
2021-01-19 22:50     ` Richard Henderson
2021-01-19 22:25   ` Philippe Mathieu-Daudé
2021-01-15 21:04 ` [PATCH v2 09/22] tcg/riscv: " Richard Henderson
2021-01-15 22:13   ` Alistair Francis
2021-01-15 22:39     ` Richard Henderson
2021-01-19 22:59     ` Richard Henderson
2021-01-19 14:52   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 10/22] tcg/s390: " Richard Henderson
2021-01-19 14:55   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 11/22] tcg/sparc: " Richard Henderson
2021-01-19 14:58   ` Peter Maydell
2021-01-19 23:29     ` Richard Henderson
2021-01-15 21:04 ` [PATCH v2 12/22] tcg: Remove TCG_TARGET_CON_STR_H Richard Henderson
2021-01-19 14:58   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 13/22] tcg/i386: Split out constraint sets to tcg-target-con-set.h Richard Henderson
2021-01-19 15:27   ` Peter Maydell
2021-01-19 23:48     ` Richard Henderson
2021-01-20 13:44       ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 14/22] tcg/aarch64: " Richard Henderson
2021-01-19 15:31   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 15/22] tcg/arm: " Richard Henderson
2021-01-19 15:33   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 16/22] tcg/mips: " Richard Henderson
2021-01-19 15:35   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 17/22] tcg/ppc: " Richard Henderson
2021-01-19 15:38   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 18/22] tcg/riscv: " Richard Henderson
2021-01-19 15:39   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 19/22] tcg/s390: " Richard Henderson
2021-01-19 15:43   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 20/22] tcg/sparc: " Richard Henderson
2021-01-19 15:49   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 21/22] tcg/tci: " Richard Henderson
2021-01-19 16:09   ` Peter Maydell
2021-01-20  2:32     ` Richard Henderson
2021-01-15 21:04 ` [PATCH v2 22/22] tcg: Remove TCG_TARGET_CON_SET_H Richard Henderson
2021-01-19 16:10   ` Peter Maydell
2021-01-15 21:30 ` [PATCH v2 00/22] tcg: backend constraints cleanup no-reply

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