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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PATCH v2 08/22] tcg/mips: Split out target constraints to tcg-target-con-str.h
Date: Fri, 15 Jan 2021 11:04:42 -1000	[thread overview]
Message-ID: <20210115210456.1053477-9-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210115210456.1053477-1-richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/mips/tcg-target-con-str.h | 24 ++++++++++++
 tcg/mips/tcg-target.h         |  1 +
 tcg/mips/tcg-target.c.inc     | 72 ++++++++---------------------------
 3 files changed, 41 insertions(+), 56 deletions(-)
 create mode 100644 tcg/mips/tcg-target-con-str.h

diff --git a/tcg/mips/tcg-target-con-str.h b/tcg/mips/tcg-target-con-str.h
new file mode 100644
index 0000000000..e4b2965c72
--- /dev/null
+++ b/tcg/mips/tcg-target-con-str.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Define MIPS target-specific operand constraints.
+ * Copyright (c) 2021 Linaro
+ */
+
+/*
+ * Define constraint letters for register sets:
+ * REGS(letter, register_mask)
+ */
+REGS('r', ALL_GENERAL_REGS)
+REGS('L', ALL_QLOAD_REGS)
+REGS('S', ALL_QSTORE_REGS)
+
+/*
+ * Define constraint letters for constants:
+ * CONST(letter, TCG_CT_CONST_* bit set)
+ */
+CONST('I', TCG_CT_CONST_U16)
+CONST('J', TCG_CT_CONST_S16)
+CONST('K', TCG_CT_CONST_P2M1)
+CONST('N', TCG_CT_CONST_N16)
+CONST('W', TCG_CT_CONST_WSZ)
+CONST('Z', TCG_CT_CONST_ZERO)
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index c2c32fb38f..d850200855 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -207,5 +207,6 @@ void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t);
 #ifdef CONFIG_SOFTMMU
 #define TCG_TARGET_NEED_LDST_LABELS
 #endif
+#define TCG_TARGET_CON_STR_H
 
 #endif
diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
index 7293169ab2..61e8740012 100644
--- a/tcg/mips/tcg-target.c.inc
+++ b/tcg/mips/tcg-target.c.inc
@@ -171,67 +171,27 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
 #define TCG_CT_CONST_N16  0x1000   /* "Negatable" 16-bit: -32767 - 32767 */
 #define TCG_CT_CONST_WSZ  0x2000   /* word size */
 
+#define ALL_GENERAL_REGS  0xffffffffu
+#define NOA0_REGS         (ALL_GENERAL_REGS & ~(1 << TCG_REG_A0))
+
+#ifdef CONFIG_SOFTMMU
+#define ALL_QLOAD_REGS \
+    (NOA0_REGS & ~((TCG_TARGET_REG_BITS < TARGET_LONG_BITS) << TCG_REG_A2))
+#define ALL_QSTORE_REGS \
+    (NOA0_REGS & ~(TCG_TARGET_REG_BITS < TARGET_LONG_BITS   \
+                   ? (1 << TCG_REG_A2) | (1 << TCG_REG_A3)  \
+                   : (1 << TCG_REG_A1)))
+#else
+#define ALL_QLOAD_REGS   NOA0_REGS
+#define ALL_QSTORE_REGS  NOA0_REGS
+#endif
+
+
 static inline bool is_p2m1(tcg_target_long val)
 {
     return val && ((val + 1) & val) == 0;
 }
 
-/* parse target specific constraints */
-static const char *target_parse_constraint(TCGArgConstraint *ct,
-                                           const char *ct_str, TCGType type)
-{
-    switch(*ct_str++) {
-    case 'r':
-        ct->regs = 0xffffffff;
-        break;
-    case 'L': /* qemu_ld input arg constraint */
-        ct->regs = 0xffffffff;
-        tcg_regset_reset_reg(ct->regs, TCG_REG_A0);
-#if defined(CONFIG_SOFTMMU)
-        if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
-            tcg_regset_reset_reg(ct->regs, TCG_REG_A2);
-        }
-#endif
-        break;
-    case 'S': /* qemu_st constraint */
-        ct->regs = 0xffffffff;
-        tcg_regset_reset_reg(ct->regs, TCG_REG_A0);
-#if defined(CONFIG_SOFTMMU)
-        if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
-            tcg_regset_reset_reg(ct->regs, TCG_REG_A2);
-            tcg_regset_reset_reg(ct->regs, TCG_REG_A3);
-        } else {
-            tcg_regset_reset_reg(ct->regs, TCG_REG_A1);
-        }
-#endif
-        break;
-    case 'I':
-        ct->ct |= TCG_CT_CONST_U16;
-        break;
-    case 'J':
-        ct->ct |= TCG_CT_CONST_S16;
-        break;
-    case 'K':
-        ct->ct |= TCG_CT_CONST_P2M1;
-        break;
-    case 'N':
-        ct->ct |= TCG_CT_CONST_N16;
-        break;
-    case 'W':
-        ct->ct |= TCG_CT_CONST_WSZ;
-        break;
-    case 'Z':
-        /* We are cheating a bit here, using the fact that the register
-           ZERO is also the register number 0. Hence there is no need
-           to check for const_args in each instruction. */
-        ct->ct |= TCG_CT_CONST_ZERO;
-        break;
-    default:
-        return NULL;
-    }
-    return ct_str;
-}
-
 /* test if a constant matches the constraint */
 static inline int tcg_target_const_match(tcg_target_long val, TCGType type,
                                          const TCGArgConstraint *arg_ct)
-- 
2.25.1



  parent reply	other threads:[~2021-01-15 21:13 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-15 21:04 [PATCH v2 00/22] tcg: backend constraints cleanup Richard Henderson
2021-01-15 21:04 ` [PATCH v2 01/22] tcg/tci: Drop L and S constraints Richard Henderson
2021-01-19 14:23   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 02/22] tcg/i386: Move constraint type check to tcg_target_const_match Richard Henderson
2021-01-19 14:27   ` Peter Maydell
2021-01-19 19:19     ` Richard Henderson
2021-01-15 21:04 ` [PATCH v2 03/22] tcg/i386: Split out target constraints to tcg-target-con-str.h Richard Henderson
2021-01-19 14:38   ` Peter Maydell
2021-01-19 17:46     ` Richard Henderson
2021-01-19 18:07       ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 04/22] tcg/arm: " Richard Henderson
2021-01-19 14:42   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 05/22] tcg/aarch64: " Richard Henderson
2021-01-19 14:44   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 06/22] tcg/ppc: " Richard Henderson
2021-01-19 14:47   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 07/22] tcg/tci: " Richard Henderson
2021-01-19 14:47   ` Peter Maydell
2021-01-19 22:19   ` Philippe Mathieu-Daudé
2021-01-15 21:04 ` Richard Henderson [this message]
2021-01-19 14:50   ` [PATCH v2 08/22] tcg/mips: " Peter Maydell
2021-01-19 22:50     ` Richard Henderson
2021-01-19 22:25   ` Philippe Mathieu-Daudé
2021-01-15 21:04 ` [PATCH v2 09/22] tcg/riscv: " Richard Henderson
2021-01-15 22:13   ` Alistair Francis
2021-01-15 22:39     ` Richard Henderson
2021-01-19 22:59     ` Richard Henderson
2021-01-19 14:52   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 10/22] tcg/s390: " Richard Henderson
2021-01-19 14:55   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 11/22] tcg/sparc: " Richard Henderson
2021-01-19 14:58   ` Peter Maydell
2021-01-19 23:29     ` Richard Henderson
2021-01-15 21:04 ` [PATCH v2 12/22] tcg: Remove TCG_TARGET_CON_STR_H Richard Henderson
2021-01-19 14:58   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 13/22] tcg/i386: Split out constraint sets to tcg-target-con-set.h Richard Henderson
2021-01-19 15:27   ` Peter Maydell
2021-01-19 23:48     ` Richard Henderson
2021-01-20 13:44       ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 14/22] tcg/aarch64: " Richard Henderson
2021-01-19 15:31   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 15/22] tcg/arm: " Richard Henderson
2021-01-19 15:33   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 16/22] tcg/mips: " Richard Henderson
2021-01-19 15:35   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 17/22] tcg/ppc: " Richard Henderson
2021-01-19 15:38   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 18/22] tcg/riscv: " Richard Henderson
2021-01-19 15:39   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 19/22] tcg/s390: " Richard Henderson
2021-01-19 15:43   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 20/22] tcg/sparc: " Richard Henderson
2021-01-19 15:49   ` Peter Maydell
2021-01-15 21:04 ` [PATCH v2 21/22] tcg/tci: " Richard Henderson
2021-01-19 16:09   ` Peter Maydell
2021-01-20  2:32     ` Richard Henderson
2021-01-15 21:04 ` [PATCH v2 22/22] tcg: Remove TCG_TARGET_CON_SET_H Richard Henderson
2021-01-19 16:10   ` Peter Maydell
2021-01-15 21:30 ` [PATCH v2 00/22] tcg: backend constraints cleanup no-reply

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