From: Fred Gao <fred.gao@intel.com> To: kvm@vger.kernel.org, intel-gfx@lists.freedesktop.org Cc: Fred Gao <fred.gao@intel.com>, Zhenyu Wang <zhenyuw@linux.intel.com>, Swee Yee Fonn <swee.yee.fonn@intel.com> Subject: [PATCH v2] vfio/pci: Add support for opregion v2.0+ Date: Mon, 18 Jan 2021 20:38:34 +0800 [thread overview] Message-ID: <20210118123834.5991-1-fred.gao@intel.com> (raw) In-Reply-To: <20201202171249.17083-1-fred.gao@intel.com> Before opregion version 2.0 VBT data is stored in opregion mailbox #4, However, When VBT data exceeds 6KB size and cannot be within mailbox #4 starting from opregion v2.0+, Extended VBT region, next to opregion, is used to hold the VBT data, so the total size will be opregion size plus extended VBT region size. Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com> Signed-off-by: Fred Gao <fred.gao@intel.com> --- drivers/vfio/pci/vfio_pci_igd.c | 59 +++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c index 53d97f459252..fc470278a492 100644 --- a/drivers/vfio/pci/vfio_pci_igd.c +++ b/drivers/vfio/pci/vfio_pci_igd.c @@ -21,6 +21,10 @@ #define OPREGION_SIZE (8 * 1024) #define OPREGION_PCI_ADDR 0xfc +#define OPREGION_RVDA 0x3ba +#define OPREGION_RVDS 0x3c2 +#define OPREGION_VERSION 0x16 + static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf, size_t count, loff_t *ppos, bool iswrite) { @@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev) u32 addr, size; void *base; int ret; + u16 version; ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr); if (ret) @@ -83,6 +88,60 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev) size *= 1024; /* In KB */ + /* + * Support opregion v2.0+ + * When VBT data exceeds 6KB size and cannot be within mailbox #4 + * Extended VBT region, next to opregion, is used to hold the VBT data. + * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS + * (VBT Data Size) from opregion structure member are used to hold the + * address from region base and size of VBT data while RVDA/RVDS + * are not defined before opregion 2.0. + * + * opregion 2.0: rvda is the physical VBT address. + * + * opregion 2.1+: rvda is unsigned, relative offset from + * opregion base, and should never point within opregion. + */ + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION)); + if (version >= 0x0200) { + u64 rvda; + u32 rvds; + + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA)); + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS)); + if (rvda && rvds) { + u32 offset; + + if (version == 0x0200) + offset = rvda - (u64)addr; + else + offset = rvda; + + if (offset != size) { + pci_err(vdev->pdev, + "Extended VBT does not follow opregion !\n" + "opregion version 0x%x:offset 0x%x\n", version, offset); + return -EINVAL; + } + + /* + * the only difference between opregion 2.0 and 2.1 is + * rvda addressing mode. since rvda is physical host + * VBT address and cannot be directly used in guest, + * faked into opregion 2.1's relative offset. + */ + if (version == 0x0200) { + *(__le16 *)(base + OPREGION_VERSION) = + cpu_to_le16(0x0201); + (*(__le64 *)(base + OPREGION_RVDA)) = + cpu_to_le64((rvda - (u64)addr)); + } + + /* region size for opregion v2.0+: opregion and VBT size */ + size = offset + rvds; + } + } + if (size != OPREGION_SIZE) { memunmap(base); base = memremap(addr, size, MEMREMAP_WB); -- 2.24.1.1.gb6d4d82bd5
WARNING: multiple messages have this Message-ID (diff)
From: Fred Gao <fred.gao@intel.com> To: kvm@vger.kernel.org, intel-gfx@lists.freedesktop.org Cc: Fred Gao <fred.gao@intel.com>, Swee Yee Fonn <swee.yee.fonn@intel.com> Subject: [Intel-gfx] [PATCH v2] vfio/pci: Add support for opregion v2.0+ Date: Mon, 18 Jan 2021 20:38:34 +0800 [thread overview] Message-ID: <20210118123834.5991-1-fred.gao@intel.com> (raw) In-Reply-To: <20201202171249.17083-1-fred.gao@intel.com> Before opregion version 2.0 VBT data is stored in opregion mailbox #4, However, When VBT data exceeds 6KB size and cannot be within mailbox #4 starting from opregion v2.0+, Extended VBT region, next to opregion, is used to hold the VBT data, so the total size will be opregion size plus extended VBT region size. Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com> Signed-off-by: Fred Gao <fred.gao@intel.com> --- drivers/vfio/pci/vfio_pci_igd.c | 59 +++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c index 53d97f459252..fc470278a492 100644 --- a/drivers/vfio/pci/vfio_pci_igd.c +++ b/drivers/vfio/pci/vfio_pci_igd.c @@ -21,6 +21,10 @@ #define OPREGION_SIZE (8 * 1024) #define OPREGION_PCI_ADDR 0xfc +#define OPREGION_RVDA 0x3ba +#define OPREGION_RVDS 0x3c2 +#define OPREGION_VERSION 0x16 + static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf, size_t count, loff_t *ppos, bool iswrite) { @@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev) u32 addr, size; void *base; int ret; + u16 version; ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr); if (ret) @@ -83,6 +88,60 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev) size *= 1024; /* In KB */ + /* + * Support opregion v2.0+ + * When VBT data exceeds 6KB size and cannot be within mailbox #4 + * Extended VBT region, next to opregion, is used to hold the VBT data. + * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS + * (VBT Data Size) from opregion structure member are used to hold the + * address from region base and size of VBT data while RVDA/RVDS + * are not defined before opregion 2.0. + * + * opregion 2.0: rvda is the physical VBT address. + * + * opregion 2.1+: rvda is unsigned, relative offset from + * opregion base, and should never point within opregion. + */ + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION)); + if (version >= 0x0200) { + u64 rvda; + u32 rvds; + + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA)); + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS)); + if (rvda && rvds) { + u32 offset; + + if (version == 0x0200) + offset = rvda - (u64)addr; + else + offset = rvda; + + if (offset != size) { + pci_err(vdev->pdev, + "Extended VBT does not follow opregion !\n" + "opregion version 0x%x:offset 0x%x\n", version, offset); + return -EINVAL; + } + + /* + * the only difference between opregion 2.0 and 2.1 is + * rvda addressing mode. since rvda is physical host + * VBT address and cannot be directly used in guest, + * faked into opregion 2.1's relative offset. + */ + if (version == 0x0200) { + *(__le16 *)(base + OPREGION_VERSION) = + cpu_to_le16(0x0201); + (*(__le64 *)(base + OPREGION_RVDA)) = + cpu_to_le64((rvda - (u64)addr)); + } + + /* region size for opregion v2.0+: opregion and VBT size */ + size = offset + rvds; + } + } + if (size != OPREGION_SIZE) { memunmap(base); base = memremap(addr, size, MEMREMAP_WB); -- 2.24.1.1.gb6d4d82bd5 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-01-18 4:46 UTC|newest] Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-12-02 17:12 [PATCH v1] vfio/pci: Add support for opregion v2.0+ Fred Gao 2020-12-02 17:12 ` [Intel-gfx] " Fred Gao 2020-12-02 10:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork 2020-12-02 10:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-12-02 12:06 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2020-12-02 18:57 ` [PATCH v1] " Alex Williamson 2020-12-02 18:57 ` [Intel-gfx] " Alex Williamson 2020-12-03 9:21 ` Gao, Fred 2020-12-03 9:21 ` [Intel-gfx] " Gao, Fred 2020-12-03 23:38 ` Alex Williamson 2020-12-03 23:38 ` [Intel-gfx] " Alex Williamson 2021-01-18 5:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for vfio/pci: Add support for opregion v2.0+ (rev2) Patchwork 2021-01-18 5:46 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork 2021-01-18 12:38 ` Fred Gao [this message] 2021-01-18 12:38 ` [Intel-gfx] [PATCH v2] vfio/pci: Add support for opregion v2.0+ Fred Gao 2021-01-21 20:33 ` Alex Williamson 2021-01-21 20:33 ` [Intel-gfx] " Alex Williamson 2021-02-02 5:09 ` Zhenyu Wang 2021-02-02 5:09 ` [Intel-gfx] " Zhenyu Wang 2021-02-08 17:02 ` [PATCH v3] vfio/pci: Add support for opregion v2.1+ Fred Gao 2021-02-08 17:02 ` [Intel-gfx] " Fred Gao 2021-03-02 13:02 ` [PATCH v4] " Fred Gao 2021-03-02 13:02 ` [Intel-gfx] " Fred Gao 2021-03-19 19:26 ` Alex Williamson 2021-03-19 19:26 ` [Intel-gfx] " Alex Williamson 2021-03-25 8:50 ` Gao, Fred 2021-03-25 8:50 ` [Intel-gfx] " Gao, Fred 2021-03-25 17:09 ` [PATCH v5] " Fred Gao 2021-03-25 17:09 ` [Intel-gfx] " Fred Gao 2021-03-30 9:08 ` Zhenyu Wang 2021-03-30 9:08 ` [Intel-gfx] " Zhenyu Wang 2021-04-06 19:37 ` Alex Williamson 2021-04-06 19:37 ` [Intel-gfx] " Alex Williamson 2021-02-08 9:22 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for vfio/pci: Add support for opregion v2.0+ (rev3) Patchwork 2021-02-08 9:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-03-02 6:49 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for vfio/pci: Add support for opregion v2.0+ (rev4) Patchwork 2021-03-02 12:47 ` Gao, Fred 2021-03-02 6:55 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork 2021-03-02 17:09 ` [Intel-gfx] ✓ Fi.CI.BAT: " Patchwork 2021-03-25 21:05 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion v2.0+ (rev5) Patchwork 2021-03-29 7:12 ` Gao, Fred 2021-03-29 7:12 ` Zhenyu Wang 2021-03-29 16:19 ` Vudum, Lakshminarayana 2021-03-29 16:22 ` Gao, Fred 2021-03-29 16:35 ` Vudum, Lakshminarayana 2021-03-25 21:31 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork 2021-03-29 15:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-03-29 18:35 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210118123834.5991-1-fred.gao@intel.com \ --to=fred.gao@intel.com \ --cc=intel-gfx@lists.freedesktop.org \ --cc=kvm@vger.kernel.org \ --cc=swee.yee.fonn@intel.com \ --cc=zhenyuw@linux.intel.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.