From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: linux-renesas-soc@vger.kernel.org
Cc: Wolfram Sang <wsa+renesas@sang-engineering.com>
Subject: [PATCH v2 2/4] arm64: dts: renesas: falcon: add SCIF0 nodes
Date: Thu, 21 Jan 2021 12:00:06 +0100 [thread overview]
Message-ID: <20210121110008.15894-3-wsa+renesas@sang-engineering.com> (raw)
In-Reply-To: <20210121110008.15894-1-wsa+renesas@sang-engineering.com>
SCIF0 has been enabled by the firmware, so it worked already. Still, add
the proper nodes to make it work in any case.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
Changes since v1:
* moved to Falcon CPU dtsi
.../boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
index c54d1e287a49..1a36239cdc5d 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
@@ -225,6 +225,9 @@ &mmc0 {
};
&pfc {
+ pinctrl-0 = <&scif_clk_pins>;
+ pinctrl-names = "default";
+
avb0_pins: avb0 {
mux {
groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
@@ -368,8 +371,26 @@ mmc_pins: mmc {
function = "mmc";
power-source = <1800>;
};
+
+ scif0_pins: scif0 {
+ groups = "scif0_data", "scif0_ctrl";
+ function = "scif0";
+ };
+
+ scif_clk_pins: scif_clk {
+ groups = "scif_clk";
+ function = "scif_clk";
+ };
};
&scif0 {
+ pinctrl-0 = <&scif0_pins>;
+ pinctrl-names = "default";
+
+ uart-has-rtscts;
status = "okay";
};
+
+&scif_clk {
+ clock-frequency = <24000000>;
+};
--
2.29.2
next prev parent reply other threads:[~2021-01-21 11:02 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-21 11:00 [PATCH v2 0/4] v3u: add support for SCIF Wolfram Sang
2021-01-21 11:00 ` [PATCH v2 1/4] arm64: dts: renesas: r8a779a0: add & update SCIF nodes Wolfram Sang
2021-01-22 10:39 ` Geert Uytterhoeven
2021-01-21 11:00 ` Wolfram Sang [this message]
2021-01-22 10:41 ` [PATCH v2 2/4] arm64: dts: renesas: falcon: add SCIF0 nodes Geert Uytterhoeven
2021-01-21 11:00 ` [PATCH v2 3/4] arm64: dts: renesas: r8a779a0: Add HSCIF support Wolfram Sang
2021-01-22 10:43 ` Geert Uytterhoeven
2021-01-25 9:19 ` Geert Uytterhoeven
2021-01-21 11:00 ` [PATCH v2 4/4] HACK: make hscif0 console Wolfram Sang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210121110008.15894-3-wsa+renesas@sang-engineering.com \
--to=wsa+renesas@sang-engineering.com \
--cc=linux-renesas-soc@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.