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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [CI 1/3] drm/i915/gt: Flush GT interrupt handler before changing interrupt state
Date: Thu, 21 Jan 2021 15:49:48 +0000	[thread overview]
Message-ID: <20210121154950.19898-1-chris@chris-wilson.co.uk> (raw)

Before we clear any state that may be being written by an interrupt
handler on another core, flush the interrupt handlers.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index b31ce0d60028..e8c20f80e353 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -2656,7 +2656,10 @@ static void enable_error_interrupt(struct intel_engine_cs *engine)
 {
 	u32 status;
 
+	/* Flush ongoing GT interrupts before touching interrupt state */
+	synchronize_hardirq(engine->i915->drm.irq);
 	engine->execlists.error_interrupt = 0;
+
 	ENGINE_WRITE(engine, RING_EMR, ~0u);
 	ENGINE_WRITE(engine, RING_EIR, ~0u); /* clear all existing errors */
 
-- 
2.20.1

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             reply	other threads:[~2021-01-21 15:49 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-21 15:49 Chris Wilson [this message]
2021-01-21 15:49 ` [Intel-gfx] [CI 2/3] drm/i915/gt: Move execlists_reset() out of line Chris Wilson
2021-01-21 15:49 ` [Intel-gfx] [CI 3/3] drm/i915/gt: Call stop_ring() from ring resume, again Chris Wilson
2021-01-21 16:07 ` [Intel-gfx] [CI 1/3] drm/i915/gt: Flush GT interrupt handler before changing interrupt state Mika Kuoppala
2021-01-21 23:43 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/3] " Patchwork

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