All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 6/8] drm/i915: Extract intel_crtc_dbuf_weights()
Date: Thu, 21 Jan 2021 22:53:00 +0200	[thread overview]
Message-ID: <20210121205302.24897-7-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20210121205302.24897-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Extract the code to calculate the weights used to chunk up the dbuf
between pipes. There's still extra stuff in there that shouldn't be
there and must be moved out, but that requires a bit more state to
be tracked in the dbuf state.

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 145 ++++++++++++++++++++------------
 1 file changed, 89 insertions(+), 56 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 555d8f058f1f..00a1d23663b9 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4103,62 +4103,35 @@ static unsigned int intel_crtc_ddb_weight(const struct intel_crtc_state *crtc_st
 static u8 skl_compute_dbuf_slices(struct intel_crtc *crtc,
 				  u8 active_pipes);
 
-static int
-skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv,
-				   const struct intel_crtc_state *crtc_state,
-				   const u64 total_data_rate,
-				   struct skl_ddb_entry *alloc, /* out */
-				   int *num_active /* out */)
+static int intel_crtc_dbuf_weights(struct intel_atomic_state *state,
+				   struct intel_crtc *for_crtc,
+				   unsigned int *weight_start,
+				   unsigned int *weight_end,
+				   unsigned int *weight_total)
 {
-	struct drm_atomic_state *state = crtc_state->uapi.state;
-	struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
-	struct intel_crtc *for_crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	struct intel_crtc *crtc;
-	unsigned int pipe_weight = 0, total_weight = 0, weight_before_pipe = 0;
+	const struct intel_dbuf_state *old_dbuf_state =
+		intel_atomic_get_old_dbuf_state(state);
+	struct intel_dbuf_state *new_dbuf_state =
+		intel_atomic_get_new_dbuf_state(state);
+	u8 active_pipes = new_dbuf_state->active_pipes;
 	enum pipe for_pipe = for_crtc->pipe;
-	struct intel_dbuf_state *new_dbuf_state =
-		intel_atomic_get_new_dbuf_state(intel_state);
-	const struct intel_dbuf_state *old_dbuf_state =
-		intel_atomic_get_old_dbuf_state(intel_state);
-	u8 active_pipes = new_dbuf_state->active_pipes;
-	struct skl_ddb_entry ddb_slices;
-	u32 ddb_range_size;
-	u32 i;
-	u32 dbuf_slice_mask;
-	u32 total_slice_mask;
-	u32 start, end;
-	int ret;
-
-	*num_active = hweight8(active_pipes);
-
-	if (!crtc_state->hw.active) {
-		alloc->start = 0;
-		alloc->end = 0;
-		return 0;
-	}
-
-	/*
-	 * If the state doesn't change the active CRTC's or there is no
-	 * modeset request, then there's no need to recalculate;
-	 * the existing pipe allocation limits should remain unchanged.
-	 * Note that we're safe from racing commits since any racing commit
-	 * that changes the active CRTC list or do modeset would need to
-	 * grab _all_ crtc locks, including the one we currently hold.
-	 */
-	if (old_dbuf_state->active_pipes == new_dbuf_state->active_pipes &&
-	    !dev_priv->wm.distrust_bios_wm)
-		return 0;
+	const struct intel_crtc_state *crtc_state;
+	struct intel_crtc *crtc;
+	u8 dbuf_slice_mask;
+	u8 total_slice_mask;
+	int i, ret;
 
 	/*
 	 * Get allowed DBuf slices for correspondent pipe and platform.
 	 */
 	dbuf_slice_mask = skl_compute_dbuf_slices(for_crtc, active_pipes);
-
-	skl_ddb_entry_for_slices(dev_priv, dbuf_slice_mask, &ddb_slices);
-	ddb_range_size = skl_ddb_entry_size(&ddb_slices);
-
 	total_slice_mask = dbuf_slice_mask;
-	for_each_new_intel_crtc_in_state(intel_state, crtc, crtc_state, i) {
+
+	*weight_start = 0;
+	*weight_end = 0;
+	*weight_total = 0;
+
+	for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
 		enum pipe pipe = crtc->pipe;
 		unsigned int weight;
 		u8 pipe_dbuf_slice_mask;
@@ -4189,12 +4162,14 @@ skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv,
 			continue;
 
 		weight = intel_crtc_ddb_weight(crtc_state);
-		total_weight += weight;
+		*weight_total += weight;
 
-		if (pipe < for_pipe)
-			weight_before_pipe += weight;
-		else if (pipe == for_pipe)
-			pipe_weight = weight;
+		if (pipe < for_pipe) {
+			*weight_start += weight;
+			*weight_end += weight;
+		} else if (pipe == for_pipe) {
+			*weight_end += weight;
+		}
 	}
 
 	/*
@@ -4209,15 +4184,73 @@ skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv,
 			return ret;
 	}
 
-	start = ddb_range_size * weight_before_pipe / total_weight;
-	end = ddb_range_size * (weight_before_pipe + pipe_weight) / total_weight;
+	return 0;
+}
+
+static int
+skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv,
+				   const struct intel_crtc_state *crtc_state,
+				   const u64 total_data_rate,
+				   struct skl_ddb_entry *alloc, /* out */
+				   int *num_active /* out */)
+{
+	struct intel_atomic_state *state =
+		to_intel_atomic_state(crtc_state->uapi.state);
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	unsigned int weight_start, weight_end, weight_total;
+	const struct intel_dbuf_state *old_dbuf_state =
+		intel_atomic_get_old_dbuf_state(state);
+	struct intel_dbuf_state *new_dbuf_state =
+		intel_atomic_get_new_dbuf_state(state);
+	u8 active_pipes = new_dbuf_state->active_pipes;
+	struct skl_ddb_entry ddb_slices;
+	u32 ddb_range_size;
+	u32 dbuf_slice_mask;
+	u32 start, end;
+	int ret;
+
+	*num_active = hweight8(active_pipes);
+
+	if (!crtc_state->hw.active) {
+		alloc->start = 0;
+		alloc->end = 0;
+		return 0;
+	}
+
+	/*
+	 * If the state doesn't change the active CRTC's or there is no
+	 * modeset request, then there's no need to recalculate;
+	 * the existing pipe allocation limits should remain unchanged.
+	 * Note that we're safe from racing commits since any racing commit
+	 * that changes the active CRTC list or do modeset would need to
+	 * grab _all_ crtc locks, including the one we currently hold.
+	 */
+	if (old_dbuf_state->active_pipes == new_dbuf_state->active_pipes &&
+	    !dev_priv->wm.distrust_bios_wm)
+		return 0;
+
+	/*
+	 * Get allowed DBuf slices for correspondent pipe and platform.
+	 */
+	dbuf_slice_mask = skl_compute_dbuf_slices(crtc, active_pipes);
+
+	skl_ddb_entry_for_slices(dev_priv, dbuf_slice_mask, &ddb_slices);
+	ddb_range_size = skl_ddb_entry_size(&ddb_slices);
+
+	ret = intel_crtc_dbuf_weights(state, crtc,
+				      &weight_start, &weight_end, &weight_total);
+	if (ret)
+		return ret;
+
+	start = ddb_range_size * weight_start / weight_total;
+	end = ddb_range_size * weight_end / weight_total;
 
 	alloc->start = ddb_slices.start + start;
 	alloc->end = ddb_slices.start + end;
 
 	drm_dbg_kms(&dev_priv->drm,
 		    "[CRTC:%d:%s] dbuf slices 0x%x, ddb (%d - %d), active pipes 0x%x\n",
-		    for_crtc->base.base.id, for_crtc->base.name,
+		    crtc->base.base.id, crtc->base.name,
 		    dbuf_slice_mask, alloc->start, alloc->end, active_pipes);
 
 	return 0;
-- 
2.26.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2021-01-21 20:53 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-21 20:52 [Intel-gfx] [PATCH v2 0/8] drm/i915: Remainder of dbuf state stuff Ville Syrjala
2021-01-21 20:52 ` [Intel-gfx] [PATCH v2 1/8] drm/i915: Extract intel_crtc_ddb_weight() Ville Syrjala
2021-01-21 20:52 ` [Intel-gfx] [PATCH v2 2/8] drm/i915: Pass the crtc to skl_compute_dbuf_slices() Ville Syrjala
2021-01-21 20:52 ` [Intel-gfx] [PATCH v2 3/8] drm/i915: Introduce intel_dbuf_slice_size() Ville Syrjala
2021-01-21 20:52 ` [Intel-gfx] [PATCH v2 4/8] drm/i915: Introduce skl_ddb_entry_for_slices() Ville Syrjala
2021-01-21 20:52 ` [Intel-gfx] [PATCH v2 5/8] drm/i915: Move pipe ddb entries into the dbuf state Ville Syrjala
2021-01-21 20:53 ` Ville Syrjala [this message]
2021-01-21 20:53 ` [Intel-gfx] [PATCH v2 7/8] drm/i915: Encapsulate dbuf state handling harder Ville Syrjala
2021-01-21 20:53 ` [Intel-gfx] [PATCH v2 8/8] drm/i915: Do a bit more initial readout for dbuf Ville Syrjala
2021-01-22  3:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remainder of dbuf state stuff (rev2) Patchwork
2021-01-22  3:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-22  3:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-22  7:23 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210121205302.24897-7-ville.syrjala@linux.intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.