From: <gabriel.fernandez@foss.st.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@st.com>, Philipp Zabel <p.zabel@pengutronix.de>, Etienne Carriere <etienne.carriere@st.com>, Gabriel Fernandez <gabriel.fernandez@foss.st.com> Cc: <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH 11/14] ARM: dts: stm32: define SCMI resources on stm32mp15 Date: Fri, 22 Jan 2021 11:50:58 +0100 [thread overview] Message-ID: <20210122105101.27374-12-gabriel.fernandez@foss.st.com> (raw) In-Reply-To: <20210122105101.27374-1-gabriel.fernandez@foss.st.com> From: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Platform stm32mp15 relies on SCMI resources (clocks and reset domains). This change adds SCMI resources description in the platform device tree. SCMI resources uses a mailbox based on some shared memory and a SMC mailbox notification. SCMI0 exposes clocks and reset controllers for resources under RCC[TZEN] configuration control. It is default enabled as SoC default configuration is RCC[TZEN]=1. SCMI1 exposes clocks for resources under RCC[MCKPROT] control. The node is disabled by default as default configuration is RCC[MCKPROT]=0. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> --- arch/arm/boot/dts/stm32mp151.dtsi | 50 +++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index 3c75abacb374..da3647373365 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -30,6 +30,56 @@ interrupt-parent = <&intc>; }; + scmi_sram: sram@2ffff000 { + compatible = "mmio-sram"; + reg = <0x2ffff000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x2ffff000 0x1000>; + + scmi0_shm: scmi_shm@0 { + reg = <0 0x80>; + }; + + scmi1_shm: scmi_shm@200 { + reg = <0x200 0x80>; + }; + }; + + firmware { + scmi0: scmi0 { + compatible = "arm,scmi-smc"; + #address-cells = <1>; + #size-cells = <0>; + arm,smc-id = <0x82002000>; + shmem = <&scmi0_shm>; + + scmi0_clk: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + }; + + scmi0_reset: protocol@16 { + reg = <0x16>; + #reset-cells = <1>; + }; + }; + + scmi1: scmi1 { + compatible = "arm,scmi-smc"; + #address-cells = <1>; + #size-cells = <0>; + arm,smc-id = <0x82002001>; + shmem = <&scmi1_shm>; + status = "disabled"; + + scmi1_clk: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + }; + }; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: <gabriel.fernandez@foss.st.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@st.com>, Philipp Zabel <p.zabel@pengutronix.de>, Etienne Carriere <etienne.carriere@st.com>, Gabriel Fernandez <gabriel.fernandez@foss.st.com> Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 11/14] ARM: dts: stm32: define SCMI resources on stm32mp15 Date: Fri, 22 Jan 2021 11:50:58 +0100 [thread overview] Message-ID: <20210122105101.27374-12-gabriel.fernandez@foss.st.com> (raw) In-Reply-To: <20210122105101.27374-1-gabriel.fernandez@foss.st.com> From: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Platform stm32mp15 relies on SCMI resources (clocks and reset domains). This change adds SCMI resources description in the platform device tree. SCMI resources uses a mailbox based on some shared memory and a SMC mailbox notification. SCMI0 exposes clocks and reset controllers for resources under RCC[TZEN] configuration control. It is default enabled as SoC default configuration is RCC[TZEN]=1. SCMI1 exposes clocks for resources under RCC[MCKPROT] control. The node is disabled by default as default configuration is RCC[MCKPROT]=0. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> --- arch/arm/boot/dts/stm32mp151.dtsi | 50 +++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index 3c75abacb374..da3647373365 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -30,6 +30,56 @@ interrupt-parent = <&intc>; }; + scmi_sram: sram@2ffff000 { + compatible = "mmio-sram"; + reg = <0x2ffff000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x2ffff000 0x1000>; + + scmi0_shm: scmi_shm@0 { + reg = <0 0x80>; + }; + + scmi1_shm: scmi_shm@200 { + reg = <0x200 0x80>; + }; + }; + + firmware { + scmi0: scmi0 { + compatible = "arm,scmi-smc"; + #address-cells = <1>; + #size-cells = <0>; + arm,smc-id = <0x82002000>; + shmem = <&scmi0_shm>; + + scmi0_clk: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + }; + + scmi0_reset: protocol@16 { + reg = <0x16>; + #reset-cells = <1>; + }; + }; + + scmi1: scmi1 { + compatible = "arm,scmi-smc"; + #address-cells = <1>; + #size-cells = <0>; + arm,smc-id = <0x82002001>; + shmem = <&scmi1_shm>; + status = "disabled"; + + scmi1_clk: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + }; + }; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-01-22 11:05 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-22 10:50 [PATCH 00/14] Introduce STM32MP1 RCC in secured mode gabriel.fernandez 2021-01-22 10:50 ` gabriel.fernandez 2021-01-22 10:50 ` [PATCH 01/14] clk: stm32mp1: merge 'clk-hsi-div' and 'ck_hsi' into one clock gabriel.fernandez 2021-01-22 10:50 ` gabriel.fernandez 2021-01-22 10:50 ` [PATCH 02/14] clk: stm32mp1: merge 'ck_hse_rtc' and 'ck_rtc' " gabriel.fernandez 2021-01-22 10:50 ` gabriel.fernandez 2021-01-22 10:50 ` [PATCH 03/14] clk: stm32mp1: remove intermediate pll clocks gabriel.fernandez 2021-01-22 10:50 ` gabriel.fernandez 2021-01-22 10:50 ` [PATCH 04/14] clk: stm32mp1: convert to module driver gabriel.fernandez 2021-01-22 10:50 ` gabriel.fernandez 2021-01-22 10:50 ` [PATCH 05/14] clk: stm32mp1: move RCC reset controller into RCC clock driver gabriel.fernandez 2021-01-22 10:50 ` gabriel.fernandez 2021-01-22 10:50 ` [PATCH 06/14] reset: stm32mp1: remove stm32mp1 reset gabriel.fernandez 2021-01-22 10:50 ` gabriel.fernandez 2021-01-22 10:50 ` [PATCH 07/14] dt-bindings: clock: add IDs for SCMI clocks on stm32mp15 gabriel.fernandez 2021-01-22 10:50 ` gabriel.fernandez 2021-01-22 10:50 ` [PATCH 08/14] dt-bindings: reset: add IDs for SCMI reset domains " gabriel.fernandez 2021-01-22 10:50 ` gabriel.fernandez 2021-01-22 10:50 ` [PATCH 09/14] dt-bindings: reset: add MCU HOLD BOOT ID " gabriel.fernandez 2021-01-22 10:50 ` gabriel.fernandez 2021-01-22 10:50 ` [PATCH 10/14] clk: stm32mp1: new compatible for secure RCC support gabriel.fernandez 2021-01-22 10:50 ` gabriel.fernandez 2021-01-22 10:50 ` gabriel.fernandez [this message] 2021-01-22 10:50 ` [PATCH 11/14] ARM: dts: stm32: define SCMI resources on stm32mp15 gabriel.fernandez 2021-01-22 10:50 ` [PATCH 12/14] ARM: dts: stm32: move clocks/resets to SCMI resources for stm32mp15 gabriel.fernandez 2021-01-22 10:50 ` gabriel.fernandez 2021-01-22 10:51 ` [PATCH 13/14] dt-bindings: clock: stm32mp1 new compatible for secure rcc gabriel.fernandez 2021-01-22 10:51 ` gabriel.fernandez 2021-01-22 14:00 ` Rob Herring 2021-01-22 14:00 ` Rob Herring 2021-01-25 13:22 ` gabriel.fernandez 2021-01-25 13:22 ` gabriel.fernandez 2021-01-22 10:51 ` [PATCH 14/14] ARM: dts: stm32: introduce basic boot include on stm32mp15x board gabriel.fernandez 2021-01-22 10:51 ` gabriel.fernandez
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210122105101.27374-12-gabriel.fernandez@foss.st.com \ --to=gabriel.fernandez@foss.st.com \ --cc=alexandre.torgue@st.com \ --cc=devicetree@vger.kernel.org \ --cc=etienne.carriere@st.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-clk@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-stm32@st-md-mailman.stormreply.com \ --cc=mcoquelin.stm32@gmail.com \ --cc=mturquette@baylibre.com \ --cc=p.zabel@pengutronix.de \ --cc=robh+dt@kernel.org \ --cc=sboyd@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.