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From: Bin Meng <bmeng.cn@gmail.com>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	qemu-block@nongnu.org, qemu-riscv@nongnu.org,
	qemu-devel@nongnu.org
Cc: Bin Meng <bin.meng@windriver.com>,
	Pragnesh Patel <pragnesh.patel@sifive.com>
Subject: [PATCH v2 05/25] hw/sd: sd: Drop sd_crc16()
Date: Sat, 23 Jan 2021 18:39:56 +0800	[thread overview]
Message-ID: <20210123104016.17485-6-bmeng.cn@gmail.com> (raw)
In-Reply-To: <20210123104016.17485-1-bmeng.cn@gmail.com>

From: Bin Meng <bin.meng@windriver.com>

commit f6fb1f9b319f ("sdcard: Correct CRC16 offset in sd_function_switch()")
changed the 16-bit CRC to be stored at offset 64. In fact, this CRC
calculation is completely wrong. From the original codes, it wants
to calculate the CRC16 of the first 64 bytes of sd->data[], however
passing 64 as the `width` to sd_crc16() actually counts 256 bytes
starting from the `message` for the CRC16 calculation, which is not
what we want.

Besides that, it seems existing sd_crc16() algorithm does not match
the SD spec, which says CRC16 is the CCITT one but the calculation
does not produce expected result. It turns out the CRC16 was never
transferred outside the sd core, as in sd_read_byte() we see:

    if (sd->data_offset >= 64)
        sd->state = sd_transfer_state;

Given above reasons, let's drop it.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>

---

Changes in v2:
- Fix several typos in the commit message

 hw/sd/sd.c | 18 ------------------
 1 file changed, 18 deletions(-)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index bfea5547d5..b3952514fe 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -271,23 +271,6 @@ static uint8_t sd_crc7(const void *message, size_t width)
     return shift_reg;
 }
 
-static uint16_t sd_crc16(const void *message, size_t width)
-{
-    int i, bit;
-    uint16_t shift_reg = 0x0000;
-    const uint16_t *msg = (const uint16_t *)message;
-    width <<= 1;
-
-    for (i = 0; i < width; i ++, msg ++)
-        for (bit = 15; bit >= 0; bit --) {
-            shift_reg <<= 1;
-            if ((shift_reg >> 15) ^ ((*msg >> bit) & 1))
-                shift_reg ^= 0x1011;
-        }
-
-    return shift_reg;
-}
-
 #define OCR_POWER_DELAY_NS      500000 /* 0.5ms */
 
 FIELD(OCR, VDD_VOLTAGE_WINDOW,          0, 24)
@@ -843,7 +826,6 @@ static void sd_function_switch(SDState *sd, uint32_t arg)
         sd->data[16 - (i >> 1)] |= new_func << ((i % 2) * 4);
     }
     memset(&sd->data[17], 0, 47);
-    stw_be_p(sd->data + 64, sd_crc16(sd->data, 64));
 }
 
 static inline bool sd_wp_addr(SDState *sd, uint64_t addr)
-- 
2.25.1



  parent reply	other threads:[~2021-01-23 10:52 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-23 10:39 [PATCH v2 00/25] hw/riscv: sifive_u: Add missing SPI support Bin Meng
2021-01-23 10:39 ` [PATCH v2 01/25] hw/block: m25p80: Add ISSI SPI flash support Bin Meng
2021-01-23 10:39 ` [PATCH v2 02/25] hw/block: m25p80: Add various ISSI flash information Bin Meng
2021-01-23 10:39 ` [PATCH v2 03/25] hw/sd: ssi-sd: Fix incorrect card response sequence Bin Meng
2021-01-24 17:48   ` Philippe Mathieu-Daudé
2021-01-23 10:39 ` [PATCH v2 04/25] hw/sd: sd: Support CMD59 for SPI mode Bin Meng
2021-01-24 17:21   ` Philippe Mathieu-Daudé
2021-01-23 10:39 ` Bin Meng [this message]
2021-01-24 18:14   ` [PATCH v2 05/25] hw/sd: sd: Drop sd_crc16() Philippe Mathieu-Daudé
2021-01-23 10:39 ` [PATCH v2 06/25] util: Add CRC16 (CCITT) calculation routines Bin Meng
2021-01-24 18:59   ` Philippe Mathieu-Daudé
2021-01-24 20:07     ` Richard Henderson
2021-01-24 20:24       ` Philippe Mathieu-Daudé
2021-01-24 20:24         ` Philippe Mathieu-Daudé
2021-01-24 21:41         ` Richard Henderson
2021-01-24 21:41           ` Richard Henderson
2021-01-26  7:44           ` Philippe Mathieu-Daudé
2021-01-23 10:39 ` [PATCH v2 07/25] hw/sd: ssi-sd: Suffix a data block with CRC16 Bin Meng
2021-01-24 18:57   ` Philippe Mathieu-Daudé
2021-01-23 10:39 ` [PATCH v2 08/25] hw/sd: ssi-sd: Add a state representing Nac Bin Meng
2021-01-24 17:26   ` Philippe Mathieu-Daudé
2021-01-24 17:47   ` Philippe Mathieu-Daudé
2021-01-23 10:40 ` [PATCH v2 09/25] hw/sd: ssi-sd: Fix the wrong command index for STOP_TRANSMISSION Bin Meng
2021-01-24 17:33   ` Philippe Mathieu-Daudé
2021-01-24 17:35     ` Philippe Mathieu-Daudé
2021-01-25  0:33     ` Bin Meng
2021-01-25  0:33       ` Bin Meng
2021-01-25  0:42       ` Bin Meng
2021-01-25  0:42         ` Bin Meng
2021-01-23 10:40 ` [PATCH v2 10/25] hw/sd: ssi-sd: Support multiple block read Bin Meng
2021-01-23 10:40 ` [PATCH v2 11/25] hw/sd: ssi-sd: Use macros for the dummy value and tokens in the transfer Bin Meng
2021-01-24 17:36   ` Philippe Mathieu-Daudé
2021-01-23 10:40 ` [PATCH v2 12/25] hw/sd: sd: Remove duplicated codes in single/multiple block read/write Bin Meng
2021-01-23 10:40 ` [PATCH v2 13/25] hw/sd: sd: Allow single/multiple block write for SPI mode Bin Meng
2021-01-23 10:40 ` [PATCH v2 14/25] hw/sd: sd.h: Cosmetic change of using spaces Bin Meng
2021-01-24 17:43   ` Philippe Mathieu-Daudé
2021-01-23 10:40 ` [PATCH v2 15/25] hw/sd: Introduce receive_ready() callback Bin Meng
2021-01-23 10:40 ` [PATCH v2 16/25] hw/sd: ssi-sd: Support single block write Bin Meng
2021-01-23 10:40 ` [PATCH v2 17/25] hw/sd: ssi-sd: Support multiple " Bin Meng
2021-01-23 10:40 ` [PATCH v2 18/25] hw/sd: ssi-sd: Bump up version ids of VMStateDescription Bin Meng
2021-01-24 16:59   ` Philippe Mathieu-Daudé
2021-01-24 17:07     ` Philippe Mathieu-Daudé
2021-01-25  1:20     ` Bin Meng
2021-01-25  1:20       ` Bin Meng
2021-01-25 10:41       ` Dr. David Alan Gilbert
2021-01-25 10:41         ` Dr. David Alan Gilbert
2021-01-25 10:48         ` Bin Meng
2021-01-25 10:48           ` Bin Meng
2021-01-23 10:40 ` [PATCH v2 19/25] hw/ssi: Add SiFive SPI controller support Bin Meng
2021-01-23 10:40 ` [PATCH v2 20/25] hw/riscv: sifive_u: Add QSPI0 controller and connect a flash Bin Meng
2021-01-23 10:40 ` [PATCH v2 21/25] hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card Bin Meng
2021-01-23 10:40 ` [PATCH v2 22/25] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value Bin Meng
2021-01-23 10:40 ` [PATCH v2 23/25] docs/system: Sort targets in alphabetical order Bin Meng
2021-01-23 10:40 ` [PATCH v2 24/25] docs/system: Add RISC-V documentation Bin Meng
2021-01-23 10:40 ` [PATCH v2 25/25] docs/system: riscv: Add documentation for sifive_u machine Bin Meng
2021-01-24 20:07 ` [PATCH v2 00/25] hw/riscv: sifive_u: Add missing SPI support Philippe Mathieu-Daudé

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