From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
David Brazdil <dbrazdil@google.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Ard Biesheuvel <ardb@kernel.org>,
Jing Zhang <jingzhangos@google.com>,
Ajay Patil <pajay@qti.qualcomm.com>,
Prasad Sodagudi <psodagud@codeaurora.org>,
Srinivas Ramana <sramana@codeaurora.org>,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
kernel-team@android.com
Subject: [PATCH v5 05/21] arm64: Initialise as nVHE before switching to VHE
Date: Mon, 25 Jan 2021 10:50:03 +0000 [thread overview]
Message-ID: <20210125105019.2946057-6-maz@kernel.org> (raw)
In-Reply-To: <20210125105019.2946057-1-maz@kernel.org>
As we are aiming to be able to control whether we enable VHE or
not, let's always drop down to EL1 first, and only then upgrade
to VHE if at all possible.
This means that if the kernel is booted at EL2, we always start
with a nVHE init, drop to EL1 to initialise the the kernel, and
only then upgrade the kernel EL to EL2 if possible (the process
is obviously shortened for secondary CPUs).
The resume path is handled similarly to a secondary CPU boot.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: David Brazdil <dbrazdil@google.com>
---
arch/arm64/kernel/head.S | 38 ++----------------------------------
arch/arm64/kernel/hyp-stub.S | 24 +++++++++++++++++++++++
arch/arm64/kernel/sleep.S | 1 +
3 files changed, 27 insertions(+), 36 deletions(-)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 28e9735302df..07445fd976ef 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -433,6 +433,7 @@ SYM_FUNC_START_LOCAL(__primary_switched)
bl __pi_memset
dsb ishst // Make zero page visible to PTW
+ bl switch_to_vhe
#if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS)
bl kasan_early_init
#endif
@@ -493,42 +494,6 @@ SYM_INNER_LABEL(init_el1, SYM_L_LOCAL)
eret
SYM_INNER_LABEL(init_el2, SYM_L_LOCAL)
-#ifdef CONFIG_ARM64_VHE
- /*
- * Check for VHE being present. x2 being non-zero indicates that we
- * do have VHE, and that the kernel is intended to run at EL2.
- */
- mrs x2, id_aa64mmfr1_el1
- ubfx x2, x2, #ID_AA64MMFR1_VHE_SHIFT, #4
-#else
- mov x2, xzr
-#endif
- cbz x2, init_el2_nvhe
-
- /*
- * When VHE _is_ in use, EL1 will not be used in the host and
- * requires no configuration, and all non-hyp-specific EL2 setup
- * will be done via the _EL1 system register aliases in __cpu_setup.
- */
- mov_q x0, HCR_HOST_VHE_FLAGS
- msr hcr_el2, x0
- isb
-
- init_el2_state vhe
-
- isb
-
- mov_q x0, INIT_PSTATE_EL2
- msr spsr_el2, x0
- msr elr_el2, lr
- mov w0, #BOOT_CPU_MODE_EL2
- eret
-
-SYM_INNER_LABEL(init_el2_nvhe, SYM_L_LOCAL)
- /*
- * When VHE is not in use, early init of EL2 and EL1 needs to be
- * done here.
- */
mov_q x0, INIT_SCTLR_EL1_MMU_OFF
msr sctlr_el1, x0
@@ -623,6 +588,7 @@ SYM_FUNC_START_LOCAL(secondary_startup)
/*
* Common entry point for secondary CPUs.
*/
+ bl switch_to_vhe
bl __cpu_secondary_check52bitva
bl __cpu_setup // initialise processor
adrp x1, swapper_pg_dir
diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S
index 3f3dbbe8914d..373ed2213e1d 100644
--- a/arch/arm64/kernel/hyp-stub.S
+++ b/arch/arm64/kernel/hyp-stub.S
@@ -190,3 +190,27 @@ SYM_FUNC_START(__hyp_reset_vectors)
hvc #0
ret
SYM_FUNC_END(__hyp_reset_vectors)
+
+/*
+ * Entry point to switch to VHE if deemed capable
+ */
+SYM_FUNC_START(switch_to_vhe)
+#ifdef CONFIG_ARM64_VHE
+ // Need to have booted at EL2
+ adr_l x1, __boot_cpu_mode
+ ldr w0, [x1]
+ cmp w0, #BOOT_CPU_MODE_EL2
+ b.ne 1f
+
+ // and still be at EL1
+ mrs x0, CurrentEL
+ cmp x0, #CurrentEL_EL1
+ b.ne 1f
+
+ // Turn the world upside down
+ mov x0, #HVC_VHE_RESTART
+ hvc #0
+1:
+#endif
+ ret
+SYM_FUNC_END(switch_to_vhe)
diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S
index 6bdef7362c0e..5bfd9b87f85d 100644
--- a/arch/arm64/kernel/sleep.S
+++ b/arch/arm64/kernel/sleep.S
@@ -100,6 +100,7 @@ SYM_FUNC_END(__cpu_suspend_enter)
.pushsection ".idmap.text", "awx"
SYM_CODE_START(cpu_resume)
bl init_kernel_el
+ bl switch_to_vhe
bl __cpu_setup
/* enable the MMU early - so we can access sleep_save_stash by va */
adrp x1, swapper_pg_dir
--
2.29.2
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org
Cc: Prasad Sodagudi <psodagud@codeaurora.org>,
Srinivas Ramana <sramana@codeaurora.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Ajay Patil <pajay@qti.qualcomm.com>,
kernel-team@android.com, Will Deacon <will@kernel.org>,
Ard Biesheuvel <ardb@kernel.org>
Subject: [PATCH v5 05/21] arm64: Initialise as nVHE before switching to VHE
Date: Mon, 25 Jan 2021 10:50:03 +0000 [thread overview]
Message-ID: <20210125105019.2946057-6-maz@kernel.org> (raw)
In-Reply-To: <20210125105019.2946057-1-maz@kernel.org>
As we are aiming to be able to control whether we enable VHE or
not, let's always drop down to EL1 first, and only then upgrade
to VHE if at all possible.
This means that if the kernel is booted at EL2, we always start
with a nVHE init, drop to EL1 to initialise the the kernel, and
only then upgrade the kernel EL to EL2 if possible (the process
is obviously shortened for secondary CPUs).
The resume path is handled similarly to a secondary CPU boot.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: David Brazdil <dbrazdil@google.com>
---
arch/arm64/kernel/head.S | 38 ++----------------------------------
arch/arm64/kernel/hyp-stub.S | 24 +++++++++++++++++++++++
arch/arm64/kernel/sleep.S | 1 +
3 files changed, 27 insertions(+), 36 deletions(-)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 28e9735302df..07445fd976ef 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -433,6 +433,7 @@ SYM_FUNC_START_LOCAL(__primary_switched)
bl __pi_memset
dsb ishst // Make zero page visible to PTW
+ bl switch_to_vhe
#if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS)
bl kasan_early_init
#endif
@@ -493,42 +494,6 @@ SYM_INNER_LABEL(init_el1, SYM_L_LOCAL)
eret
SYM_INNER_LABEL(init_el2, SYM_L_LOCAL)
-#ifdef CONFIG_ARM64_VHE
- /*
- * Check for VHE being present. x2 being non-zero indicates that we
- * do have VHE, and that the kernel is intended to run at EL2.
- */
- mrs x2, id_aa64mmfr1_el1
- ubfx x2, x2, #ID_AA64MMFR1_VHE_SHIFT, #4
-#else
- mov x2, xzr
-#endif
- cbz x2, init_el2_nvhe
-
- /*
- * When VHE _is_ in use, EL1 will not be used in the host and
- * requires no configuration, and all non-hyp-specific EL2 setup
- * will be done via the _EL1 system register aliases in __cpu_setup.
- */
- mov_q x0, HCR_HOST_VHE_FLAGS
- msr hcr_el2, x0
- isb
-
- init_el2_state vhe
-
- isb
-
- mov_q x0, INIT_PSTATE_EL2
- msr spsr_el2, x0
- msr elr_el2, lr
- mov w0, #BOOT_CPU_MODE_EL2
- eret
-
-SYM_INNER_LABEL(init_el2_nvhe, SYM_L_LOCAL)
- /*
- * When VHE is not in use, early init of EL2 and EL1 needs to be
- * done here.
- */
mov_q x0, INIT_SCTLR_EL1_MMU_OFF
msr sctlr_el1, x0
@@ -623,6 +588,7 @@ SYM_FUNC_START_LOCAL(secondary_startup)
/*
* Common entry point for secondary CPUs.
*/
+ bl switch_to_vhe
bl __cpu_secondary_check52bitva
bl __cpu_setup // initialise processor
adrp x1, swapper_pg_dir
diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S
index 3f3dbbe8914d..373ed2213e1d 100644
--- a/arch/arm64/kernel/hyp-stub.S
+++ b/arch/arm64/kernel/hyp-stub.S
@@ -190,3 +190,27 @@ SYM_FUNC_START(__hyp_reset_vectors)
hvc #0
ret
SYM_FUNC_END(__hyp_reset_vectors)
+
+/*
+ * Entry point to switch to VHE if deemed capable
+ */
+SYM_FUNC_START(switch_to_vhe)
+#ifdef CONFIG_ARM64_VHE
+ // Need to have booted at EL2
+ adr_l x1, __boot_cpu_mode
+ ldr w0, [x1]
+ cmp w0, #BOOT_CPU_MODE_EL2
+ b.ne 1f
+
+ // and still be at EL1
+ mrs x0, CurrentEL
+ cmp x0, #CurrentEL_EL1
+ b.ne 1f
+
+ // Turn the world upside down
+ mov x0, #HVC_VHE_RESTART
+ hvc #0
+1:
+#endif
+ ret
+SYM_FUNC_END(switch_to_vhe)
diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S
index 6bdef7362c0e..5bfd9b87f85d 100644
--- a/arch/arm64/kernel/sleep.S
+++ b/arch/arm64/kernel/sleep.S
@@ -100,6 +100,7 @@ SYM_FUNC_END(__cpu_suspend_enter)
.pushsection ".idmap.text", "awx"
SYM_CODE_START(cpu_resume)
bl init_kernel_el
+ bl switch_to_vhe
bl __cpu_setup
/* enable the MMU early - so we can access sleep_save_stash by va */
adrp x1, swapper_pg_dir
--
2.29.2
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Jing Zhang <jingzhangos@google.com>,
Prasad Sodagudi <psodagud@codeaurora.org>,
Srinivas Ramana <sramana@codeaurora.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
James Morse <james.morse@arm.com>,
Ajay Patil <pajay@qti.qualcomm.com>,
kernel-team@android.com, David Brazdil <dbrazdil@google.com>,
Will Deacon <will@kernel.org>, Ard Biesheuvel <ardb@kernel.org>,
Julien Thierry <julien.thierry.kdev@gmail.com>
Subject: [PATCH v5 05/21] arm64: Initialise as nVHE before switching to VHE
Date: Mon, 25 Jan 2021 10:50:03 +0000 [thread overview]
Message-ID: <20210125105019.2946057-6-maz@kernel.org> (raw)
In-Reply-To: <20210125105019.2946057-1-maz@kernel.org>
As we are aiming to be able to control whether we enable VHE or
not, let's always drop down to EL1 first, and only then upgrade
to VHE if at all possible.
This means that if the kernel is booted at EL2, we always start
with a nVHE init, drop to EL1 to initialise the the kernel, and
only then upgrade the kernel EL to EL2 if possible (the process
is obviously shortened for secondary CPUs).
The resume path is handled similarly to a secondary CPU boot.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: David Brazdil <dbrazdil@google.com>
---
arch/arm64/kernel/head.S | 38 ++----------------------------------
arch/arm64/kernel/hyp-stub.S | 24 +++++++++++++++++++++++
arch/arm64/kernel/sleep.S | 1 +
3 files changed, 27 insertions(+), 36 deletions(-)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 28e9735302df..07445fd976ef 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -433,6 +433,7 @@ SYM_FUNC_START_LOCAL(__primary_switched)
bl __pi_memset
dsb ishst // Make zero page visible to PTW
+ bl switch_to_vhe
#if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS)
bl kasan_early_init
#endif
@@ -493,42 +494,6 @@ SYM_INNER_LABEL(init_el1, SYM_L_LOCAL)
eret
SYM_INNER_LABEL(init_el2, SYM_L_LOCAL)
-#ifdef CONFIG_ARM64_VHE
- /*
- * Check for VHE being present. x2 being non-zero indicates that we
- * do have VHE, and that the kernel is intended to run at EL2.
- */
- mrs x2, id_aa64mmfr1_el1
- ubfx x2, x2, #ID_AA64MMFR1_VHE_SHIFT, #4
-#else
- mov x2, xzr
-#endif
- cbz x2, init_el2_nvhe
-
- /*
- * When VHE _is_ in use, EL1 will not be used in the host and
- * requires no configuration, and all non-hyp-specific EL2 setup
- * will be done via the _EL1 system register aliases in __cpu_setup.
- */
- mov_q x0, HCR_HOST_VHE_FLAGS
- msr hcr_el2, x0
- isb
-
- init_el2_state vhe
-
- isb
-
- mov_q x0, INIT_PSTATE_EL2
- msr spsr_el2, x0
- msr elr_el2, lr
- mov w0, #BOOT_CPU_MODE_EL2
- eret
-
-SYM_INNER_LABEL(init_el2_nvhe, SYM_L_LOCAL)
- /*
- * When VHE is not in use, early init of EL2 and EL1 needs to be
- * done here.
- */
mov_q x0, INIT_SCTLR_EL1_MMU_OFF
msr sctlr_el1, x0
@@ -623,6 +588,7 @@ SYM_FUNC_START_LOCAL(secondary_startup)
/*
* Common entry point for secondary CPUs.
*/
+ bl switch_to_vhe
bl __cpu_secondary_check52bitva
bl __cpu_setup // initialise processor
adrp x1, swapper_pg_dir
diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S
index 3f3dbbe8914d..373ed2213e1d 100644
--- a/arch/arm64/kernel/hyp-stub.S
+++ b/arch/arm64/kernel/hyp-stub.S
@@ -190,3 +190,27 @@ SYM_FUNC_START(__hyp_reset_vectors)
hvc #0
ret
SYM_FUNC_END(__hyp_reset_vectors)
+
+/*
+ * Entry point to switch to VHE if deemed capable
+ */
+SYM_FUNC_START(switch_to_vhe)
+#ifdef CONFIG_ARM64_VHE
+ // Need to have booted at EL2
+ adr_l x1, __boot_cpu_mode
+ ldr w0, [x1]
+ cmp w0, #BOOT_CPU_MODE_EL2
+ b.ne 1f
+
+ // and still be at EL1
+ mrs x0, CurrentEL
+ cmp x0, #CurrentEL_EL1
+ b.ne 1f
+
+ // Turn the world upside down
+ mov x0, #HVC_VHE_RESTART
+ hvc #0
+1:
+#endif
+ ret
+SYM_FUNC_END(switch_to_vhe)
diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S
index 6bdef7362c0e..5bfd9b87f85d 100644
--- a/arch/arm64/kernel/sleep.S
+++ b/arch/arm64/kernel/sleep.S
@@ -100,6 +100,7 @@ SYM_FUNC_END(__cpu_suspend_enter)
.pushsection ".idmap.text", "awx"
SYM_CODE_START(cpu_resume)
bl init_kernel_el
+ bl switch_to_vhe
bl __cpu_setup
/* enable the MMU early - so we can access sleep_save_stash by va */
adrp x1, swapper_pg_dir
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-01-26 3:10 UTC|newest]
Thread overview: 114+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-25 10:49 [PATCH v5 00/21] arm64: Early CPU feature override, and applications to VHE, BTI and PAuth Marc Zyngier
2021-01-25 10:49 ` Marc Zyngier
2021-01-25 10:49 ` Marc Zyngier
2021-01-25 10:49 ` [PATCH v5 01/21] arm64: Fix labels in el2_setup macros Marc Zyngier
2021-01-25 10:49 ` Marc Zyngier
2021-01-25 10:49 ` Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 02/21] arm64: Fix outdated TCR setup comment Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 03/21] arm64: Turn the MMU-on sequence into a macro Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 04/21] arm64: Provide an 'upgrade to VHE' stub hypercall Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 12:13 ` Catalin Marinas
2021-01-25 12:13 ` Catalin Marinas
2021-01-25 12:13 ` Catalin Marinas
2021-01-25 10:50 ` Marc Zyngier [this message]
2021-01-25 10:50 ` [PATCH v5 05/21] arm64: Initialise as nVHE before switching to VHE Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 12:13 ` Catalin Marinas
2021-01-25 12:13 ` Catalin Marinas
2021-01-25 12:13 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 06/21] arm64: Move VHE-specific SPE setup to mutate_to_vhe() Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 12:14 ` Catalin Marinas
2021-01-25 12:14 ` Catalin Marinas
2021-01-25 12:14 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 07/21] arm64: Simplify init_el2_state to be non-VHE only Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 12:14 ` Catalin Marinas
2021-01-25 12:14 ` Catalin Marinas
2021-01-25 12:14 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 08/21] arm64: Move SCTLR_EL1 initialisation to EL-agnostic code Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 09/21] arm64: cpufeature: Add global feature override facility Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 12:15 ` Catalin Marinas
2021-01-25 12:15 ` Catalin Marinas
2021-01-25 12:15 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 10/21] arm64: cpufeature: Use IDreg override in __read_sysreg_by_encoding() Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 12:19 ` Catalin Marinas
2021-01-25 12:19 ` Catalin Marinas
2021-01-25 12:19 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 11/21] arm64: Extract early FDT mapping from kaslr_early_init() Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 12/21] arm64: cpufeature: Add an early command-line cpufeature override facility Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 18:37 ` Catalin Marinas
2021-01-25 18:37 ` Catalin Marinas
2021-01-25 18:37 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 13/21] arm64: Allow ID_AA64MMFR1_EL1.VH to be overridden from the command line Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 13:15 ` Suzuki K Poulose
2021-01-25 13:15 ` Suzuki K Poulose
2021-01-25 13:15 ` Suzuki K Poulose
2021-01-25 13:55 ` Marc Zyngier
2021-01-25 13:55 ` Marc Zyngier
2021-01-25 13:55 ` Marc Zyngier
2021-01-25 18:37 ` Catalin Marinas
2021-01-25 18:37 ` Catalin Marinas
2021-01-25 18:37 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 14/21] arm64: Honor VHE being disabled from the command-line Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 18:38 ` Catalin Marinas
2021-01-25 18:38 ` Catalin Marinas
2021-01-25 18:38 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 15/21] arm64: Add an aliasing facility for the idreg override Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 16/21] arm64: Make kvm-arm.mode={nvhe, protected} an alias of id_aa64mmfr1.vh=0 Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 17/21] KVM: arm64: Document HVC_VHE_RESTART stub hypercall Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 18/21] arm64: Move "nokaslr" over to the early cpufeature infrastructure Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 12:54 ` Ard Biesheuvel
2021-01-25 12:54 ` Ard Biesheuvel
2021-01-25 12:54 ` Ard Biesheuvel
2021-01-25 13:54 ` Marc Zyngier
2021-01-25 13:54 ` Marc Zyngier
2021-01-25 13:54 ` Marc Zyngier
2021-01-25 14:19 ` Ard Biesheuvel
2021-01-25 14:19 ` Ard Biesheuvel
2021-01-25 14:19 ` Ard Biesheuvel
2021-01-25 14:28 ` Marc Zyngier
2021-01-25 14:28 ` Marc Zyngier
2021-01-25 14:28 ` Marc Zyngier
2021-01-25 15:00 ` Ard Biesheuvel
2021-01-25 15:00 ` Ard Biesheuvel
2021-01-25 15:00 ` Ard Biesheuvel
2021-01-25 10:50 ` [PATCH v5 19/21] arm64: cpufeatures: Allow disabling of BTI from the command-line Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 20/21] arm64: Defer enabling pointer authentication on boot core Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 21/21] arm64: cpufeatures: Allow disabling of Pointer Auth from the command-line Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
2021-01-25 10:50 ` Marc Zyngier
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