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From: Andre Przywara <andre.przywara@arm.com>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>
Cc: "Jernej Skrabec" <jernej.skrabec@siol.net>,
	"Samuel Holland" <samuel@sholland.org>,
	"Icenowy Zheng" <icenowy@aosc.io>,
	"Rob Herring" <robh@kernel.org>,
	"Clément Péron" <peron.clem@gmail.com>,
	"Shuosheng Huang" <huangshuosheng@allwinnertech.com>,
	"Yangtao Li" <tiny.windzz@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
	"Alexandre Torgue" <alexandre.torgue@st.com>,
	"David S . Miller" <davem@davemloft.net>,
	"Giuseppe Cavallaro" <peppe.cavallaro@st.com>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Jose Abreu" <joabreu@synopsys.com>,
	netdev@vger.kernel.org
Subject: [PATCH v4 14/21] net: stmmac: dwmac-sun8i: Prepare for second EMAC clock register
Date: Mon, 25 Jan 2021 15:18:04 +0000	[thread overview]
Message-ID: <20210125151811.11871-15-andre.przywara@arm.com> (raw)
In-Reply-To: <20210125151811.11871-1-andre.przywara@arm.com>

The Allwinner H616 SoC has two EMAC controllers, with the second one
being tied to the internal PHY, but also using a separate EMAC clock
register.

To tell the driver about which clock register to use, we add a parameter
to our syscon phandle. The driver will use this value as an index into
the regmap, so that we can address more than the first register, if
needed.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index 58e0511badba..c7951790ed98 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -1124,11 +1124,13 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
 	struct stmmac_resources stmmac_res;
 	struct sunxi_priv_data *gmac;
 	struct device *dev = &pdev->dev;
+	struct reg_field syscon_field;
 	phy_interface_t interface;
 	int ret;
 	struct stmmac_priv *priv;
 	struct net_device *ndev;
 	struct regmap *regmap;
+	u32 syscon_idx = 0;
 
 	ret = stmmac_get_platform_resources(pdev, &stmmac_res);
 	if (ret)
@@ -1190,8 +1192,12 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
 		return ret;
 	}
 
-	gmac->regmap_field = devm_regmap_field_alloc(dev, regmap,
-						     *gmac->variant->syscon_field);
+	syscon_field = *gmac->variant->syscon_field;
+	ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1,
+					 &syscon_idx);
+	if (!ret)
+		syscon_field.reg += syscon_idx * sizeof(u32);
+	gmac->regmap_field = devm_regmap_field_alloc(dev, regmap, syscon_field);
 	if (IS_ERR(gmac->regmap_field)) {
 		ret = PTR_ERR(gmac->regmap_field);
 		dev_err(dev, "Unable to map syscon register: %d\n", ret);
@@ -1263,6 +1269,8 @@ static const struct of_device_id sun8i_dwmac_match[] = {
 		.data = &emac_variant_a64 },
 	{ .compatible = "allwinner,sun50i-h6-emac",
 		.data = &emac_variant_h6 },
+	{ .compatible = "allwinner,sun50i-h616-emac",
+		.data = &emac_variant_h6 },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
-- 
2.17.5


WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>
Cc: "Jernej Skrabec" <jernej.skrabec@siol.net>,
	"Alexandre Torgue" <alexandre.torgue@st.com>,
	"Samuel Holland" <samuel@sholland.org>,
	"Yangtao Li" <tiny.windzz@gmail.com>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	"Jakub Kicinski" <kuba@kernel.org>,
	linux-sunxi@googlegroups.com, "Jose Abreu" <joabreu@synopsys.com>,
	"Clément Péron" <peron.clem@gmail.com>,
	"Giuseppe Cavallaro" <peppe.cavallaro@st.com>,
	"Shuosheng Huang" <huangshuosheng@allwinnertech.com>,
	"David S . Miller" <davem@davemloft.net>,
	linux-arm-kernel@lists.infradead.org,
	"Icenowy Zheng" <icenowy@aosc.io>
Subject: [PATCH v4 14/21] net: stmmac: dwmac-sun8i: Prepare for second EMAC clock register
Date: Mon, 25 Jan 2021 15:18:04 +0000	[thread overview]
Message-ID: <20210125151811.11871-15-andre.przywara@arm.com> (raw)
In-Reply-To: <20210125151811.11871-1-andre.przywara@arm.com>

The Allwinner H616 SoC has two EMAC controllers, with the second one
being tied to the internal PHY, but also using a separate EMAC clock
register.

To tell the driver about which clock register to use, we add a parameter
to our syscon phandle. The driver will use this value as an index into
the regmap, so that we can address more than the first register, if
needed.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index 58e0511badba..c7951790ed98 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -1124,11 +1124,13 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
 	struct stmmac_resources stmmac_res;
 	struct sunxi_priv_data *gmac;
 	struct device *dev = &pdev->dev;
+	struct reg_field syscon_field;
 	phy_interface_t interface;
 	int ret;
 	struct stmmac_priv *priv;
 	struct net_device *ndev;
 	struct regmap *regmap;
+	u32 syscon_idx = 0;
 
 	ret = stmmac_get_platform_resources(pdev, &stmmac_res);
 	if (ret)
@@ -1190,8 +1192,12 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
 		return ret;
 	}
 
-	gmac->regmap_field = devm_regmap_field_alloc(dev, regmap,
-						     *gmac->variant->syscon_field);
+	syscon_field = *gmac->variant->syscon_field;
+	ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1,
+					 &syscon_idx);
+	if (!ret)
+		syscon_field.reg += syscon_idx * sizeof(u32);
+	gmac->regmap_field = devm_regmap_field_alloc(dev, regmap, syscon_field);
 	if (IS_ERR(gmac->regmap_field)) {
 		ret = PTR_ERR(gmac->regmap_field);
 		dev_err(dev, "Unable to map syscon register: %d\n", ret);
@@ -1263,6 +1269,8 @@ static const struct of_device_id sun8i_dwmac_match[] = {
 		.data = &emac_variant_a64 },
 	{ .compatible = "allwinner,sun50i-h6-emac",
 		.data = &emac_variant_h6 },
+	{ .compatible = "allwinner,sun50i-h616-emac",
+		.data = &emac_variant_h6 },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
-- 
2.17.5


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  parent reply	other threads:[~2021-01-26  7:05 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-25 15:17 [PATCH v4 00/21] arm64: sunxi: Initial Allwinner H616 SoC support Andre Przywara
2021-01-25 15:17 ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 01/21] dt-bindings: clk: sunxi-ccu: Add compatible string for Allwinner H616 Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 02/21] clk: sunxi-ng: Add support for the Allwinner H616 R-CCU Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 03/21] clk: sunxi-ng: Add support for the Allwinner H616 CCU Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 04/21] dt-bindings: mfd: axp20x: Add AXP305 compatible (plus optional IRQ) Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 05/21] Input: axp20x-pek: Bail out if AXP has no interrupt line connected Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 06/21] mfd: axp20x: Allow AXP chips without interrupt lines Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 07/21] dt-bindings: sram: sunxi-sram: Add H616 compatible string Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 08/21] soc: sunxi: sram: Add support for more than one EMAC clock Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 09/21] dt-bindings: watchdog: sun4i: Add H616 compatible string Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 10/21] dt-bindings: i2c: mv64xxx: " Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 11/21] dt-bindings: media: IR: Add H616 IR " Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 12/21] dt-bindings: rtc: sun6i: Add H616 " Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 22:51   ` Alexandre Belloni
2021-01-25 22:51     ` Alexandre Belloni
2021-01-26  0:14     ` Andre Przywara
2021-01-26  0:14       ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 13/21] dt-bindings: spi: sunxi: " Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` Andre Przywara [this message]
2021-01-25 15:18   ` [PATCH v4 14/21] net: stmmac: dwmac-sun8i: Prepare for second EMAC clock register Andre Przywara
2021-01-25 15:18 ` [PATCH v4 15/21] phy: sun4i-usb: Rework HCI PHY (aka. "pmu_unk1") handling Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 16/21] dt-bindings: usb: Add H616 compatible string Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 17/21] dt-bindings: usb: sunxi-musb: " Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 18/21] phy: sun4i-usb: Add support for the H616 USB PHY Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 19/21] arm64: dts: allwinner: Add Allwinner H616 .dtsi file Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 20/21] dt-bindings: arm: sunxi: Add OrangePi Zero 2 binding Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 21/21] arm64: dts: allwinner: Add OrangePi Zero 2 .dts Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-26 12:07 ` [PATCH v4 00/21] arm64: sunxi: Initial Allwinner H616 SoC support Maxime Ripard
2021-01-26 12:07   ` Maxime Ripard
2021-01-27 17:15 ` (subset) " Mark Brown
2021-01-27 17:29   ` Andre Przywara
2021-01-27 17:29     ` Andre Przywara

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