From: Alexander Shiyan <shc_work@mail.ru>
To: linux-arm-kernel@lists.infradead.org
Cc: Shawn Guo <shawnguo@kernel.org>, Alexander Shiyan <shc_work@mail.ru>
Subject: [PATCH] ARM: dts: imx6ql-pfla02: Move "hog" pins into corresponded pin groups
Date: Wed, 27 Jan 2021 09:16:41 +0300 [thread overview]
Message-ID: <20210127061641.2314-1-shc_work@mail.ru> (raw)
Move the "hog" pins to the corresponding pin groups for SPI, ENET, PMIC,
LEDs, so that these pins can be used for different purposes when the
respective drivers are disabled.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 30 +++++++++++---------
1 file changed, 17 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index 7a1e53195785..702bbd6735df 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -41,6 +41,8 @@ reg_usb_h1_vbus: regulator@1 {
};
gpio_leds: leds {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_leds>;
compatible = "gpio-leds";
green {
@@ -122,6 +124,8 @@ som_eeprom: eeprom@50 {
};
pmic@58 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pmic>;
compatible = "dlg,da9063";
reg = <0x58>;
interrupt-parent = <&gpio2>;
@@ -215,25 +219,13 @@ &i2c3 {
};
&iomuxc {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_hog>;
-
imx6q-phytec-pfla02 {
- pinctrl_hog: hoggrp {
- fsl,pins = <
- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
- MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
- MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x80000000 /* PMIC interrupt */
- MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* Green LED */
- MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 /* Red LED */
- >;
- };
-
pinctrl_ecspi3: ecspi3grp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
+ MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* CS0 */
>;
};
@@ -255,6 +247,7 @@ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 /* Reset GPIO */
>;
};
@@ -308,10 +301,21 @@ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
>;
};
+ pinctrl_leds: ledsgrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* Green LED */
+ MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 /* Red LED */
+ >;
+ };
+
pinctrl_pcie: pciegrp {
fsl,pins = <MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000>;
};
+ pinctrl_pmic: pmicgrp {
+ fsl,pins = <MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x80000000>; /* PMIC interrupt */
+ };
+
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
--
2.26.2
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reply other threads:[~2021-01-27 6:19 UTC|newest]
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