From: Andre Przywara <andre.przywara@arm.com> To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org> Cc: "Jernej Skrabec" <jernej.skrabec@siol.net>, "Samuel Holland" <samuel@sholland.org>, "Icenowy Zheng" <icenowy@aosc.io>, "Rob Herring" <robh@kernel.org>, "Clément Péron" <peron.clem@gmail.com>, "Shuosheng Huang" <huangshuosheng@allwinnertech.com>, "Yangtao Li" <tiny.windzz@gmail.com>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH v5 08/20] soc: sunxi: sram: Add support for more than one EMAC clock Date: Wed, 27 Jan 2021 17:24:48 +0000 [thread overview] Message-ID: <20210127172500.13356-9-andre.przywara@arm.com> (raw) In-Reply-To: <20210127172500.13356-1-andre.przywara@arm.com> The Allwinner H616 adds a second EMAC clock register at offset 0x34, for controlling the second EMAC in this chip. Allow to extend the regmap in this case, to cover more than the current 4 bytes exported. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- drivers/soc/sunxi/sunxi_sram.c | 31 +++++++++++++++++++++++-------- 1 file changed, 23 insertions(+), 8 deletions(-) diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c index d4c7bd59429e..42833e33a96c 100644 --- a/drivers/soc/sunxi/sunxi_sram.c +++ b/drivers/soc/sunxi/sunxi_sram.c @@ -283,7 +283,7 @@ int sunxi_sram_release(struct device *dev) EXPORT_SYMBOL(sunxi_sram_release); struct sunxi_sramc_variant { - bool has_emac_clock; + int num_emac_clocks; }; static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = { @@ -291,20 +291,31 @@ static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = { }; static const struct sunxi_sramc_variant sun8i_h3_sramc_variant = { - .has_emac_clock = true, + .num_emac_clocks = 1, }; static const struct sunxi_sramc_variant sun50i_a64_sramc_variant = { - .has_emac_clock = true, + .num_emac_clocks = 1, +}; + +static const struct sunxi_sramc_variant sun50i_h616_sramc_variant = { + .num_emac_clocks = 2, }; #define SUNXI_SRAM_EMAC_CLOCK_REG 0x30 static bool sunxi_sram_regmap_accessible_reg(struct device *dev, unsigned int reg) { - if (reg == SUNXI_SRAM_EMAC_CLOCK_REG) - return true; - return false; + const struct sunxi_sramc_variant *variant; + + variant = of_device_get_match_data(dev); + + if (reg < SUNXI_SRAM_EMAC_CLOCK_REG) + return false; + if (reg > SUNXI_SRAM_EMAC_CLOCK_REG + variant->num_emac_clocks * 4) + return false; + + return true; } static struct regmap_config sunxi_sram_emac_clock_regmap = { @@ -312,7 +323,7 @@ static struct regmap_config sunxi_sram_emac_clock_regmap = { .val_bits = 32, .reg_stride = 4, /* last defined register */ - .max_register = SUNXI_SRAM_EMAC_CLOCK_REG, + .max_register = SUNXI_SRAM_EMAC_CLOCK_REG + 4, /* other devices have no business accessing other registers */ .readable_reg = sunxi_sram_regmap_accessible_reg, .writeable_reg = sunxi_sram_regmap_accessible_reg, @@ -343,7 +354,7 @@ static int sunxi_sram_probe(struct platform_device *pdev) if (!d) return -ENOMEM; - if (variant->has_emac_clock) { + if (variant->num_emac_clocks > 0) { emac_clock = devm_regmap_init_mmio(&pdev->dev, base, &sunxi_sram_emac_clock_regmap); @@ -387,6 +398,10 @@ static const struct of_device_id sunxi_sram_dt_match[] = { .compatible = "allwinner,sun50i-h5-system-control", .data = &sun50i_a64_sramc_variant, }, + { + .compatible = "allwinner,sun50i-h616-system-control", + .data = &sun50i_h616_sramc_variant, + }, { }, }; MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match); -- 2.17.5
WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com> To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org> Cc: "Jernej Skrabec" <jernej.skrabec@siol.net>, "Samuel Holland" <samuel@sholland.org>, "Yangtao Li" <tiny.windzz@gmail.com>, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, "Clément Péron" <peron.clem@gmail.com>, "Shuosheng Huang" <huangshuosheng@allwinnertech.com>, linux-arm-kernel@lists.infradead.org, "Icenowy Zheng" <icenowy@aosc.io> Subject: [PATCH v5 08/20] soc: sunxi: sram: Add support for more than one EMAC clock Date: Wed, 27 Jan 2021 17:24:48 +0000 [thread overview] Message-ID: <20210127172500.13356-9-andre.przywara@arm.com> (raw) In-Reply-To: <20210127172500.13356-1-andre.przywara@arm.com> The Allwinner H616 adds a second EMAC clock register at offset 0x34, for controlling the second EMAC in this chip. Allow to extend the regmap in this case, to cover more than the current 4 bytes exported. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- drivers/soc/sunxi/sunxi_sram.c | 31 +++++++++++++++++++++++-------- 1 file changed, 23 insertions(+), 8 deletions(-) diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c index d4c7bd59429e..42833e33a96c 100644 --- a/drivers/soc/sunxi/sunxi_sram.c +++ b/drivers/soc/sunxi/sunxi_sram.c @@ -283,7 +283,7 @@ int sunxi_sram_release(struct device *dev) EXPORT_SYMBOL(sunxi_sram_release); struct sunxi_sramc_variant { - bool has_emac_clock; + int num_emac_clocks; }; static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = { @@ -291,20 +291,31 @@ static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = { }; static const struct sunxi_sramc_variant sun8i_h3_sramc_variant = { - .has_emac_clock = true, + .num_emac_clocks = 1, }; static const struct sunxi_sramc_variant sun50i_a64_sramc_variant = { - .has_emac_clock = true, + .num_emac_clocks = 1, +}; + +static const struct sunxi_sramc_variant sun50i_h616_sramc_variant = { + .num_emac_clocks = 2, }; #define SUNXI_SRAM_EMAC_CLOCK_REG 0x30 static bool sunxi_sram_regmap_accessible_reg(struct device *dev, unsigned int reg) { - if (reg == SUNXI_SRAM_EMAC_CLOCK_REG) - return true; - return false; + const struct sunxi_sramc_variant *variant; + + variant = of_device_get_match_data(dev); + + if (reg < SUNXI_SRAM_EMAC_CLOCK_REG) + return false; + if (reg > SUNXI_SRAM_EMAC_CLOCK_REG + variant->num_emac_clocks * 4) + return false; + + return true; } static struct regmap_config sunxi_sram_emac_clock_regmap = { @@ -312,7 +323,7 @@ static struct regmap_config sunxi_sram_emac_clock_regmap = { .val_bits = 32, .reg_stride = 4, /* last defined register */ - .max_register = SUNXI_SRAM_EMAC_CLOCK_REG, + .max_register = SUNXI_SRAM_EMAC_CLOCK_REG + 4, /* other devices have no business accessing other registers */ .readable_reg = sunxi_sram_regmap_accessible_reg, .writeable_reg = sunxi_sram_regmap_accessible_reg, @@ -343,7 +354,7 @@ static int sunxi_sram_probe(struct platform_device *pdev) if (!d) return -ENOMEM; - if (variant->has_emac_clock) { + if (variant->num_emac_clocks > 0) { emac_clock = devm_regmap_init_mmio(&pdev->dev, base, &sunxi_sram_emac_clock_regmap); @@ -387,6 +398,10 @@ static const struct of_device_id sunxi_sram_dt_match[] = { .compatible = "allwinner,sun50i-h5-system-control", .data = &sun50i_a64_sramc_variant, }, + { + .compatible = "allwinner,sun50i-h616-system-control", + .data = &sun50i_h616_sramc_variant, + }, { }, }; MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match); -- 2.17.5 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-01-27 17:54 UTC|newest] Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-27 17:24 [PATCH v5 00/20] arm64: sunxi: Initial Allwinner H616 SoC support Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-27 17:24 ` [PATCH v5 01/20] dt-bindings: clk: sunxi-ccu: Add compatible string for Allwinner H616 Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-27 17:24 ` [PATCH v5 02/20] clk: sunxi-ng: Add support for the Allwinner H616 R-CCU Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-27 17:24 ` [PATCH v5 03/20] clk: sunxi-ng: Add support for the Allwinner H616 CCU Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-27 17:24 ` [PATCH v5 04/20] dt-bindings: mfd: axp20x: Add AXP305 compatible (plus optional IRQ) Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-28 10:15 ` Maxime Ripard 2021-01-28 10:15 ` Maxime Ripard 2021-02-02 7:55 ` [linux-sunxi] " Chen-Yu Tsai 2021-02-02 7:55 ` Chen-Yu Tsai 2021-02-02 10:11 ` Andre Przywara 2021-02-02 10:11 ` Andre Przywara 2021-02-05 21:56 ` Rob Herring 2021-02-05 21:56 ` Rob Herring 2021-01-27 17:24 ` [PATCH v5 05/20] Input: axp20x-pek: Bail out if AXP has no interrupt line connected Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-27 19:42 ` Dmitry Torokhov 2021-01-27 19:42 ` Dmitry Torokhov 2021-01-28 11:11 ` Andre Przywara 2021-01-28 11:11 ` Andre Przywara 2021-01-28 11:36 ` Mark Brown 2021-01-28 11:36 ` Mark Brown 2021-01-28 12:31 ` Andre Przywara 2021-01-28 12:31 ` Andre Przywara 2021-01-28 15:05 ` Mark Brown 2021-01-28 15:05 ` Mark Brown 2021-01-27 17:24 ` [PATCH v5 06/20] mfd: axp20x: Allow AXP chips without interrupt lines Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-28 10:15 ` Maxime Ripard 2021-01-28 10:15 ` Maxime Ripard 2021-02-02 7:58 ` [linux-sunxi] " Chen-Yu Tsai 2021-02-02 7:58 ` Chen-Yu Tsai 2021-02-02 8:12 ` Lee Jones 2021-02-02 8:12 ` Lee Jones 2021-01-27 17:24 ` [PATCH v5 07/20] dt-bindings: sram: sunxi-sram: Add H616 compatible string Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-27 17:24 ` Andre Przywara [this message] 2021-01-27 17:24 ` [PATCH v5 08/20] soc: sunxi: sram: Add support for more than one EMAC clock Andre Przywara 2021-01-27 17:24 ` [PATCH v5 09/20] dt-bindings: watchdog: sun4i: Add H616 compatible string Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-27 17:24 ` [PATCH v5 10/20] dt-bindings: i2c: mv64xxx: " Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-28 8:44 ` Wolfram Sang 2021-01-28 8:44 ` Wolfram Sang 2021-01-27 17:24 ` [PATCH v5 11/20] dt-bindings: media: IR: Add H616 IR " Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-27 17:24 ` [PATCH v5 12/20] dt-bindings: rtc: sun6i: Add H616 " Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-28 10:20 ` Maxime Ripard 2021-01-28 10:20 ` Maxime Ripard 2021-01-31 13:44 ` Jernej Škrabec 2021-02-02 0:05 ` Andre Przywara 2021-02-02 0:05 ` Andre Przywara 2021-01-27 17:24 ` [PATCH v5 13/20] dt-bindings: spi: sunxi: " Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-27 17:24 ` [PATCH v5 14/20] dt-bindings: bus: rsb: " Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-02-02 7:57 ` Chen-Yu Tsai 2021-02-02 7:57 ` Chen-Yu Tsai 2021-01-27 17:24 ` [PATCH v5 15/20] dt-bindings: net: sun8i-emac: " Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-28 10:21 ` Maxime Ripard 2021-01-28 10:21 ` Maxime Ripard 2021-02-05 21:58 ` Rob Herring 2021-02-05 21:58 ` Rob Herring 2021-01-27 17:24 ` [PATCH v5 16/20] net: stmmac: dwmac-sun8i: Prepare for second EMAC clock register Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-28 10:21 ` Maxime Ripard 2021-01-28 10:21 ` Maxime Ripard 2021-01-27 17:24 ` [PATCH v5 17/20] phy: sun4i-usb: Rework HCI PHY (aka. "pmu_unk1") handling Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-27 17:24 ` [PATCH v5 18/20] arm64: dts: allwinner: Add Allwinner H616 .dtsi file Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-27 17:24 ` [PATCH v5 19/20] dt-bindings: arm: sunxi: Add OrangePi Zero 2 binding Andre Przywara 2021-01-27 17:24 ` Andre Przywara 2021-01-27 17:25 ` [PATCH v5 20/20] arm64: dts: allwinner: Add OrangePi Zero 2 .dts Andre Przywara 2021-01-27 17:25 ` Andre Przywara
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