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From: Geert Uytterhoeven <geert+renesas@glider.be>
To: "Magnus Damm" <magnus.damm@gmail.com>,
	"Ulrich Hecht" <uli+renesas@fpond.eu>,
	"Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>
Cc: linux-renesas-soc@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [PATCH/RFC 3/6] ARM: dts: r8a73a4: Add secondary CPU nodes
Date: Thu,  4 Feb 2021 14:54:06 +0100	[thread overview]
Message-ID: <20210204135409.1652604-4-geert+renesas@glider.be> (raw)
In-Reply-To: <20210204135409.1652604-1-geert+renesas@glider.be>

Add nodes for:
  - CPU1-3, which are Cortex A15 at 1.5 GHz, living in PM domain A2SL,
  - CPU4-7, which are Cortex A7 at 1.0 GHz, living in PM domain A2KL.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/r8a73a4.dtsi | 70 ++++++++++++++++++++++++++++++++++
 1 file changed, 70 insertions(+)

diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index e5fb1ce261f72f2d..d498f848d34ab6ed 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -30,6 +30,76 @@ cpu0: cpu@0 {
 			next-level-cache = <&L2_CA15>;
 		};
 
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <1>;
+			clocks = <&cpg_clocks R8A73A4_CLK_Z>;
+			clock-frequency = <1500000000>;
+			power-domains = <&pd_a2sl>;
+			next-level-cache = <&L2_CA15>;
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <2>;
+			clocks = <&cpg_clocks R8A73A4_CLK_Z>;
+			clock-frequency = <1500000000>;
+			power-domains = <&pd_a2sl>;
+			next-level-cache = <&L2_CA15>;
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <3>;
+			clocks = <&cpg_clocks R8A73A4_CLK_Z>;
+			clock-frequency = <1500000000>;
+			power-domains = <&pd_a2sl>;
+			next-level-cache = <&L2_CA15>;
+		};
+
+		cpu4: cpu@100 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x100>;
+			clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
+			clock-frequency = <1000000000>;
+			power-domains = <&pd_a2kl>;
+			next-level-cache = <&L2_CA7>;
+		};
+
+		cpu5: cpu@101 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x101>;
+			clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
+			clock-frequency = <1000000000>;
+			power-domains = <&pd_a2kl>;
+			next-level-cache = <&L2_CA7>;
+		};
+
+		cpu6: cpu@102 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x102>;
+			clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
+			clock-frequency = <1000000000>;
+			power-domains = <&pd_a2kl>;
+			next-level-cache = <&L2_CA7>;
+		};
+
+		cpu7: cpu@103 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x103>;
+			clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
+			clock-frequency = <1000000000>;
+			power-domains = <&pd_a2kl>;
+			next-level-cache = <&L2_CA7>;
+		};
+
 		L2_CA15: cache-controller-0 {
 			compatible = "cache";
 			clocks = <&cpg_clocks R8A73A4_CLK_Z>;
-- 
2.25.1


  parent reply	other threads:[~2021-02-04 17:55 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-04 13:54 [PATCH/RFC 0/6] ARM: r8a73a4: Add SMP support Geert Uytterhoeven
2021-02-04 13:54 ` [PATCH/RFC 1/6] soc: renesas: Introduce RENESAS_APMU Kconfig option Geert Uytterhoeven
2021-02-04 13:54 ` [PATCH/RFC 2/6] dt-bindings: power: renesas,apmu: Document R-Mobile APE6 support Geert Uytterhoeven
2021-02-04 13:54 ` Geert Uytterhoeven [this message]
2021-02-04 13:54 ` [PATCH/RFC 4/6] ARM: dts: r8a73a4: Add Media RAM for SMP jump stub Geert Uytterhoeven
2021-02-04 13:54 ` [PATCH/RFC 5/6] ARM: dts: r8a73a4: Add APMU nodes Geert Uytterhoeven
2021-02-04 13:54 ` [PATCH/RFC 6/6] [WIP] ARM: shmobile: r8a73a4: Add SMP support Geert Uytterhoeven
2021-02-08 20:00 ` [PATCH/RFC 0/6] ARM: " Niklas Söderlund
2021-02-10  9:11 ` Ulrich Hecht
2021-02-10  9:51   ` Geert Uytterhoeven

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