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From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Huang, Sean Z" <sean.z.huang@intel.com>, Huang@freedesktop.org
Subject: [Intel-gfx] [RFC 06/14] drm/i915/pxp: Implement funcs to create the TEE channel
Date: Fri,  5 Feb 2021 18:09:17 -0800	[thread overview]
Message-ID: <20210206020925.36729-7-daniele.ceraolospurio@intel.com> (raw)
In-Reply-To: <20210206020925.36729-1-daniele.ceraolospurio@intel.com>

From: "Huang, Sean Z" <sean.z.huang@intel.com>

Implement the funcs to create the TEE channel, so kernel can
send the TEE commands directly to TEE for creating the arbitrary
(default) session.

Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/i915/Makefile            |  3 +-
 drivers/gpu/drm/i915/i915_drv.c          |  1 +
 drivers/gpu/drm/i915/i915_drv.h          |  6 ++
 drivers/gpu/drm/i915/pxp/intel_pxp.c     | 10 +++
 drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 86 ++++++++++++++++++++++++
 drivers/gpu/drm/i915/pxp/intel_pxp_tee.h | 14 ++++
 6 files changed, 119 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
 create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index e2677e8c03e8..f0ba95a2e4fc 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -270,7 +270,8 @@ i915-y += i915_perf.o
 
 # Protected execution platform (PXP) support
 i915-$(CONFIG_DRM_I915_PXP) += \
-	pxp/intel_pxp.o
+	pxp/intel_pxp.o \
+	pxp/intel_pxp_tee.o
 
 # Post-mortem debug and GPU hang state capture
 i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 41eea02a9285..d1344eb6c849 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -325,6 +325,7 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv)
 	mutex_init(&dev_priv->wm.wm_mutex);
 	mutex_init(&dev_priv->pps_mutex);
 	mutex_init(&dev_priv->hdcp_comp_mutex);
+	mutex_init(&dev_priv->pxp_tee_comp_mutex);
 
 	i915_memcpy_init_early(dev_priv);
 	intel_runtime_pm_init_early(&dev_priv->runtime_pm);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fe1ff025f961..779eb38add40 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1205,6 +1205,12 @@ struct drm_i915_private {
 	/* Mutex to protect the above hdcp component related values. */
 	struct mutex hdcp_comp_mutex;
 
+	struct i915_pxp_comp_master *pxp_tee_master;
+	bool pxp_tee_comp_added;
+
+	/* Mutex to protect the above pxp_tee component related values. */
+	struct mutex pxp_tee_comp_mutex;
+
 	I915_SELFTEST_DECLARE(struct i915_selftest_stash selftest;)
 
 	/*
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 950daee5b907..3f3eeadb7931 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -3,6 +3,7 @@
  * Copyright(c) 2020 Intel Corporation.
  */
 #include "intel_pxp.h"
+#include "intel_pxp_tee.h"
 #include "gt/intel_context.h"
 #include "i915_drv.h"
 
@@ -67,10 +68,16 @@ void intel_pxp_init(struct intel_pxp *pxp)
 	if (ret)
 		goto out_kcr;
 
+	ret = intel_pxp_tee_component_init(pxp);
+	if (ret)
+		goto out_context;
+
 	drm_info(&gt->i915->drm, "Protected Xe Path (PXP) protected content support initialized\n");
 
 	return;
 
+out_context:
+	destroy_vcs_context(pxp);
 out_kcr:
 	kcr_pxp_disable(gt);
 }
@@ -82,7 +89,10 @@ void intel_pxp_fini(struct intel_pxp *pxp)
 	if (!intel_pxp_is_enabled(pxp))
 		return;
 
+	intel_pxp_tee_component_fini(pxp);
+
 	destroy_vcs_context(pxp);
 
 	kcr_pxp_disable(gt);
+
 }
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
new file mode 100644
index 000000000000..1d2b8c346161
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright(c) 2020 Intel Corporation.
+ */
+
+#include <linux/component.h>
+#include "drm/i915_pxp_tee_interface.h"
+#include "drm/i915_component.h"
+#include "i915_drv.h"
+#include "intel_pxp.h"
+#include "intel_pxp_tee.h"
+
+/**
+ * i915_pxp_tee_component_bind - bind funciton to pass the function pointers to pxp_tee
+ * @i915_kdev: pointer to i915 kernel device
+ * @tee_kdev: pointer to tee kernel device
+ * @data: pointer to pxp_tee_master containing the function pointers
+ *
+ * This bind function is called during the system boot or resume from system sleep.
+ *
+ * Return: return 0 if successful.
+ */
+static int i915_pxp_tee_component_bind(struct device *i915_kdev,
+				       struct device *tee_kdev, void *data)
+{
+	struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
+
+	mutex_lock(&i915->pxp_tee_comp_mutex);
+	i915->pxp_tee_master = (struct i915_pxp_comp_master *)data;
+	i915->pxp_tee_master->tee_dev = tee_kdev;
+	mutex_unlock(&i915->pxp_tee_comp_mutex);
+
+	return 0;
+}
+
+static void i915_pxp_tee_component_unbind(struct device *i915_kdev,
+					  struct device *tee_kdev, void *data)
+{
+	struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
+
+	mutex_lock(&i915->pxp_tee_comp_mutex);
+	i915->pxp_tee_master = NULL;
+	mutex_unlock(&i915->pxp_tee_comp_mutex);
+}
+
+static const struct component_ops i915_pxp_tee_component_ops = {
+	.bind   = i915_pxp_tee_component_bind,
+	.unbind = i915_pxp_tee_component_unbind,
+};
+
+int intel_pxp_tee_component_init(struct intel_pxp *pxp)
+{
+	int ret;
+	struct intel_gt *gt = pxp_to_gt(pxp);
+	struct drm_i915_private *i915 = gt->i915;
+
+	ret = component_add_typed(i915->drm.dev, &i915_pxp_tee_component_ops,
+				  I915_COMPONENT_PXP);
+	if (ret < 0) {
+		drm_err(&i915->drm, "Failed to add PXP component (%d)\n", ret);
+		return ret;
+	}
+
+	mutex_lock(&i915->pxp_tee_comp_mutex);
+	i915->pxp_tee_comp_added = true;
+	mutex_unlock(&i915->pxp_tee_comp_mutex);
+
+	return 0;
+}
+
+void intel_pxp_tee_component_fini(struct intel_pxp *pxp)
+{
+	struct intel_gt *gt = pxp_to_gt(pxp);
+	struct drm_i915_private *i915 = gt->i915;
+
+	mutex_lock(&i915->pxp_tee_comp_mutex);
+	if (!i915->pxp_tee_comp_added) {
+		mutex_unlock(&i915->pxp_tee_comp_mutex);
+		return;
+	}
+
+	i915->pxp_tee_comp_added = false;
+	mutex_unlock(&i915->pxp_tee_comp_mutex);
+
+	component_del(i915->drm.dev, &i915_pxp_tee_component_ops);
+}
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h
new file mode 100644
index 000000000000..23d050a5d3e7
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2020, Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_PXP_TEE_H__
+#define __INTEL_PXP_TEE_H__
+
+#include "intel_pxp.h"
+
+int intel_pxp_tee_component_init(struct intel_pxp *pxp);
+void intel_pxp_tee_component_fini(struct intel_pxp *pxp);
+
+#endif /* __INTEL_PXP_TEE_H__ */
-- 
2.29.2

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  parent reply	other threads:[~2021-02-06  2:10 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-06  2:09 [Intel-gfx] [RFC 00/14] Introduce Intel PXP Daniele Ceraolo Spurio
2021-02-06  2:09 ` [Intel-gfx] [RFC 01/14] drm/i915/pxp: Define PXP component interface Daniele Ceraolo Spurio
2021-02-08 11:29   ` Rodrigo Vivi
2021-02-06  2:09 ` [Intel-gfx] [RFC 02/14] mei: pxp: export pavp client to me client bus Daniele Ceraolo Spurio
2021-02-08 13:13   ` Rodrigo Vivi
2021-02-06  2:09 ` [Intel-gfx] [RFC 03/14] drm/i915/pxp: define PXP device flag and kconfig Daniele Ceraolo Spurio
2021-02-08 13:14   ` Rodrigo Vivi
2021-02-06  2:09 ` [Intel-gfx] [RFC 04/14] drm/i915/pxp: allocate a vcs context for pxp usage Daniele Ceraolo Spurio
2021-02-06 12:49   ` Chris Wilson
2021-02-08 18:27     ` Daniele Ceraolo Spurio
2021-02-06 13:01   ` Chris Wilson
2021-02-06  2:09 ` [Intel-gfx] [RFC 05/14] drm/i915/pxp: set KCR reg init during the boot time Daniele Ceraolo Spurio
2021-02-08 17:35   ` Rodrigo Vivi
2021-02-06  2:09 ` Daniele Ceraolo Spurio [this message]
2021-02-06 12:52   ` [Intel-gfx] [RFC 06/14] drm/i915/pxp: Implement funcs to create the TEE channel Chris Wilson
2021-02-06  2:09 ` [Intel-gfx] [RFC 07/14] drm/i915/pxp: Create the arbitrary session after boot Daniele Ceraolo Spurio
2021-02-06 12:55   ` Chris Wilson
2021-02-06  2:09 ` [Intel-gfx] [RFC 08/14] drm/i915/pxp: Implement arb session teardown Daniele Ceraolo Spurio
2021-02-06  4:08   ` kernel test robot
2021-02-06 12:59   ` Chris Wilson
2021-02-08 19:43     ` Daniele Ceraolo Spurio
2021-02-08 20:41       ` Chris Wilson
2021-02-06  2:09 ` [Intel-gfx] [RFC 09/14] drm/i915/pxp: Implement PXP irq handler Daniele Ceraolo Spurio
2021-02-06  2:09 ` [Intel-gfx] [RFC 10/14] drm/i915/pxp: Enable PXP power management Daniele Ceraolo Spurio
2021-02-06 13:06   ` Chris Wilson
2021-02-06 13:08     ` Chris Wilson
2021-02-08 18:33       ` Daniele Ceraolo Spurio
2021-02-06  2:09 ` [Intel-gfx] [RFC 11/14] drm/i915/uapi: introduce drm_i915_gem_create_ext Daniele Ceraolo Spurio
2021-02-06  2:09 ` [Intel-gfx] [RFC 12/14] drm/i915/pxp: User interface for Protected buffer Daniele Ceraolo Spurio
2021-02-06 12:25   ` Chris Wilson
2021-02-08 18:10     ` Daniele Ceraolo Spurio
2021-02-06  2:09 ` [Intel-gfx] [RFC 13/14] drm/i915/pxp: Add plane decryption support Daniele Ceraolo Spurio
2021-02-06  2:09 ` [Intel-gfx] [RFC 14/14] drm/i915/pxp: enable PXP for integrated Gen12 Daniele Ceraolo Spurio
2021-02-06  2:15 ` [Intel-gfx] [RFC 00/14] Introduce Intel PXP Daniele Ceraolo Spurio
2021-02-06  3:14 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-02-06  3:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-02-06  3:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-06 16:51 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-02-12 13:23 ` [Intel-gfx] [RFC 00/14] " Lionel Landwerlin
2021-02-12 15:10   ` Daniele Ceraolo Spurio
2021-02-12 15:13     ` Lionel Landwerlin

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