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From: Jitao Shi <jitao.shi@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: <airlied@linux.ie>, <daniel@ffwll.ch>, <robh+dt@kernel.org>,
	<matthias.bgg@gmail.com>, <srv_heupstream@mediatek.com>,
	<yingjoe.chen@mediatek.com>, <eddie.huang@mediatek.com>,
	<ck.hu@mediatek.com>, <dri-devel@lists.freedesktop.org>,
	<devicetree@vger.kernel.org>, <stonea168@163.com>,
	<huijuan.xie@mediatek.com>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>, <shuijing.li@mediatek.com>,
	Jitao Shi <jitao.shi@mediatek.com>
Subject: [PATCH 1/3] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid
Date: Sun, 7 Feb 2021 20:58:48 +0800	[thread overview]
Message-ID: <20210207125850.155979-2-jitao.shi@mediatek.com> (raw)
In-Reply-To: <20210207125850.155979-1-jitao.shi@mediatek.com>

Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.

Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index 52f11a63a330..ffa4a0f1989f 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -118,6 +118,7 @@ struct mtk_dpi_yc_limit {
 struct mtk_dpi_conf {
 	unsigned int (*cal_factor)(int clock);
 	u32 reg_h_fre_con;
+	u32 max_clock_khz;
 	bool edge_sel_en;
 };
 
@@ -555,9 +556,22 @@ static void mtk_dpi_bridge_enable(struct drm_bridge *bridge)
 	mtk_dpi_set_display_mode(dpi, &dpi->mode);
 }
 
+static enum drm_mode_status
+mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
+			  const struct drm_display_mode *mode)
+{
+	struct mtk_dpi *dpi = bridge_to_dpi(bridge);
+
+	if (dpi->conf->max_clock_khz && mode->clock > dpi->conf->max_clock_khz)
+		return MODE_CLOCK_HIGH;
+
+	return MODE_OK;
+}
+
 static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
 	.attach = mtk_dpi_bridge_attach,
 	.mode_set = mtk_dpi_bridge_mode_set,
+	.mode_valid = mtk_dpi_bridge_mode_valid,
 	.disable = mtk_dpi_bridge_disable,
 	.enable = mtk_dpi_bridge_enable,
 };
@@ -673,17 +687,20 @@ static unsigned int mt8183_calculate_factor(int clock)
 static const struct mtk_dpi_conf mt8173_conf = {
 	.cal_factor = mt8173_calculate_factor,
 	.reg_h_fre_con = 0xe0,
+	.max_clock_khz = 300000,
 };
 
 static const struct mtk_dpi_conf mt2701_conf = {
 	.cal_factor = mt2701_calculate_factor,
 	.reg_h_fre_con = 0xb0,
 	.edge_sel_en = true,
+	.max_clock_khz = 150000,
 };
 
 static const struct mtk_dpi_conf mt8183_conf = {
 	.cal_factor = mt8183_calculate_factor,
 	.reg_h_fre_con = 0xe0,
+	.max_clock_khz = 100000,
 };
 
 static int mtk_dpi_probe(struct platform_device *pdev)
-- 
2.25.1

WARNING: multiple messages have this Message-ID (diff)
From: Jitao Shi <jitao.shi@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: devicetree@vger.kernel.org, Jitao Shi <jitao.shi@mediatek.com>,
	srv_heupstream@mediatek.com, shuijing.li@mediatek.com,
	airlied@linux.ie, huijuan.xie@mediatek.com, stonea168@163.com,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	ck.hu@mediatek.com, robh+dt@kernel.org,
	linux-mediatek@lists.infradead.org, daniel@ffwll.ch,
	matthias.bgg@gmail.com, yingjoe.chen@mediatek.com,
	eddie.huang@mediatek.com, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid
Date: Sun, 7 Feb 2021 20:58:48 +0800	[thread overview]
Message-ID: <20210207125850.155979-2-jitao.shi@mediatek.com> (raw)
In-Reply-To: <20210207125850.155979-1-jitao.shi@mediatek.com>

Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.

Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index 52f11a63a330..ffa4a0f1989f 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -118,6 +118,7 @@ struct mtk_dpi_yc_limit {
 struct mtk_dpi_conf {
 	unsigned int (*cal_factor)(int clock);
 	u32 reg_h_fre_con;
+	u32 max_clock_khz;
 	bool edge_sel_en;
 };
 
@@ -555,9 +556,22 @@ static void mtk_dpi_bridge_enable(struct drm_bridge *bridge)
 	mtk_dpi_set_display_mode(dpi, &dpi->mode);
 }
 
+static enum drm_mode_status
+mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
+			  const struct drm_display_mode *mode)
+{
+	struct mtk_dpi *dpi = bridge_to_dpi(bridge);
+
+	if (dpi->conf->max_clock_khz && mode->clock > dpi->conf->max_clock_khz)
+		return MODE_CLOCK_HIGH;
+
+	return MODE_OK;
+}
+
 static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
 	.attach = mtk_dpi_bridge_attach,
 	.mode_set = mtk_dpi_bridge_mode_set,
+	.mode_valid = mtk_dpi_bridge_mode_valid,
 	.disable = mtk_dpi_bridge_disable,
 	.enable = mtk_dpi_bridge_enable,
 };
@@ -673,17 +687,20 @@ static unsigned int mt8183_calculate_factor(int clock)
 static const struct mtk_dpi_conf mt8173_conf = {
 	.cal_factor = mt8173_calculate_factor,
 	.reg_h_fre_con = 0xe0,
+	.max_clock_khz = 300000,
 };
 
 static const struct mtk_dpi_conf mt2701_conf = {
 	.cal_factor = mt2701_calculate_factor,
 	.reg_h_fre_con = 0xb0,
 	.edge_sel_en = true,
+	.max_clock_khz = 150000,
 };
 
 static const struct mtk_dpi_conf mt8183_conf = {
 	.cal_factor = mt8183_calculate_factor,
 	.reg_h_fre_con = 0xe0,
+	.max_clock_khz = 100000,
 };
 
 static int mtk_dpi_probe(struct platform_device *pdev)
-- 
2.25.1
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Jitao Shi <jitao.shi@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: devicetree@vger.kernel.org, Jitao Shi <jitao.shi@mediatek.com>,
	srv_heupstream@mediatek.com, shuijing.li@mediatek.com,
	airlied@linux.ie, huijuan.xie@mediatek.com, stonea168@163.com,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	ck.hu@mediatek.com, robh+dt@kernel.org,
	linux-mediatek@lists.infradead.org, daniel@ffwll.ch,
	matthias.bgg@gmail.com, yingjoe.chen@mediatek.com,
	eddie.huang@mediatek.com, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid
Date: Sun, 7 Feb 2021 20:58:48 +0800	[thread overview]
Message-ID: <20210207125850.155979-2-jitao.shi@mediatek.com> (raw)
In-Reply-To: <20210207125850.155979-1-jitao.shi@mediatek.com>

Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.

Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index 52f11a63a330..ffa4a0f1989f 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -118,6 +118,7 @@ struct mtk_dpi_yc_limit {
 struct mtk_dpi_conf {
 	unsigned int (*cal_factor)(int clock);
 	u32 reg_h_fre_con;
+	u32 max_clock_khz;
 	bool edge_sel_en;
 };
 
@@ -555,9 +556,22 @@ static void mtk_dpi_bridge_enable(struct drm_bridge *bridge)
 	mtk_dpi_set_display_mode(dpi, &dpi->mode);
 }
 
+static enum drm_mode_status
+mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
+			  const struct drm_display_mode *mode)
+{
+	struct mtk_dpi *dpi = bridge_to_dpi(bridge);
+
+	if (dpi->conf->max_clock_khz && mode->clock > dpi->conf->max_clock_khz)
+		return MODE_CLOCK_HIGH;
+
+	return MODE_OK;
+}
+
 static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
 	.attach = mtk_dpi_bridge_attach,
 	.mode_set = mtk_dpi_bridge_mode_set,
+	.mode_valid = mtk_dpi_bridge_mode_valid,
 	.disable = mtk_dpi_bridge_disable,
 	.enable = mtk_dpi_bridge_enable,
 };
@@ -673,17 +687,20 @@ static unsigned int mt8183_calculate_factor(int clock)
 static const struct mtk_dpi_conf mt8173_conf = {
 	.cal_factor = mt8173_calculate_factor,
 	.reg_h_fre_con = 0xe0,
+	.max_clock_khz = 300000,
 };
 
 static const struct mtk_dpi_conf mt2701_conf = {
 	.cal_factor = mt2701_calculate_factor,
 	.reg_h_fre_con = 0xb0,
 	.edge_sel_en = true,
+	.max_clock_khz = 150000,
 };
 
 static const struct mtk_dpi_conf mt8183_conf = {
 	.cal_factor = mt8183_calculate_factor,
 	.reg_h_fre_con = 0xe0,
+	.max_clock_khz = 100000,
 };
 
 static int mtk_dpi_probe(struct platform_device *pdev)
-- 
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Jitao Shi <jitao.shi@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: devicetree@vger.kernel.org, Jitao Shi <jitao.shi@mediatek.com>,
	srv_heupstream@mediatek.com, shuijing.li@mediatek.com,
	airlied@linux.ie, huijuan.xie@mediatek.com, stonea168@163.com,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	robh+dt@kernel.org, linux-mediatek@lists.infradead.org,
	matthias.bgg@gmail.com, yingjoe.chen@mediatek.com,
	eddie.huang@mediatek.com, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid
Date: Sun, 7 Feb 2021 20:58:48 +0800	[thread overview]
Message-ID: <20210207125850.155979-2-jitao.shi@mediatek.com> (raw)
In-Reply-To: <20210207125850.155979-1-jitao.shi@mediatek.com>

Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.

Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index 52f11a63a330..ffa4a0f1989f 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -118,6 +118,7 @@ struct mtk_dpi_yc_limit {
 struct mtk_dpi_conf {
 	unsigned int (*cal_factor)(int clock);
 	u32 reg_h_fre_con;
+	u32 max_clock_khz;
 	bool edge_sel_en;
 };
 
@@ -555,9 +556,22 @@ static void mtk_dpi_bridge_enable(struct drm_bridge *bridge)
 	mtk_dpi_set_display_mode(dpi, &dpi->mode);
 }
 
+static enum drm_mode_status
+mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
+			  const struct drm_display_mode *mode)
+{
+	struct mtk_dpi *dpi = bridge_to_dpi(bridge);
+
+	if (dpi->conf->max_clock_khz && mode->clock > dpi->conf->max_clock_khz)
+		return MODE_CLOCK_HIGH;
+
+	return MODE_OK;
+}
+
 static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
 	.attach = mtk_dpi_bridge_attach,
 	.mode_set = mtk_dpi_bridge_mode_set,
+	.mode_valid = mtk_dpi_bridge_mode_valid,
 	.disable = mtk_dpi_bridge_disable,
 	.enable = mtk_dpi_bridge_enable,
 };
@@ -673,17 +687,20 @@ static unsigned int mt8183_calculate_factor(int clock)
 static const struct mtk_dpi_conf mt8173_conf = {
 	.cal_factor = mt8173_calculate_factor,
 	.reg_h_fre_con = 0xe0,
+	.max_clock_khz = 300000,
 };
 
 static const struct mtk_dpi_conf mt2701_conf = {
 	.cal_factor = mt2701_calculate_factor,
 	.reg_h_fre_con = 0xb0,
 	.edge_sel_en = true,
+	.max_clock_khz = 150000,
 };
 
 static const struct mtk_dpi_conf mt8183_conf = {
 	.cal_factor = mt8183_calculate_factor,
 	.reg_h_fre_con = 0xe0,
+	.max_clock_khz = 100000,
 };
 
 static int mtk_dpi_probe(struct platform_device *pdev)
-- 
2.25.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  reply	other threads:[~2021-02-07 13:00 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-07 12:58 [PATCH 0/3] Add check for max clock rate in mode_valid Jitao Shi
2021-02-07 12:58 ` Jitao Shi
2021-02-07 12:58 ` Jitao Shi
2021-02-07 12:58 ` Jitao Shi
2021-02-07 12:58 ` Jitao Shi [this message]
2021-02-07 12:58   ` [PATCH 1/3] drm/mediatek: mtk_dpi: " Jitao Shi
2021-02-07 12:58   ` Jitao Shi
2021-02-07 12:58   ` Jitao Shi
2021-02-07 16:58   ` kernel test robot
2021-02-07 16:58     ` kernel test robot
2021-02-07 12:58 ` [PATCH 2/3] drm/mediatek: mtk_dpi: Add dpi config for mt8192 Jitao Shi
2021-02-07 12:58   ` Jitao Shi
2021-02-07 12:58   ` Jitao Shi
2021-02-07 12:58   ` Jitao Shi
2021-02-07 15:09   ` kernel test robot
2021-02-07 15:09     ` kernel test robot
2021-02-07 17:23   ` kernel test robot
2021-02-07 17:23     ` kernel test robot
2021-02-07 12:58 ` [PATCH 3/3] dt-bindings: mediatek,dpi: add mt8192 to mediatek,dpi Jitao Shi
2021-02-07 12:58   ` Jitao Shi
2021-02-07 12:58   ` Jitao Shi
2021-02-07 12:58   ` Jitao Shi

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