From: Rebecca Cran <rebecca@nuviainc.com>
To: qemu-arm@nongnu.org, Peter Maydell <peter.maydell@linaro.org>
Cc: Rebecca Cran <rebecca@nuviainc.com>, qemu-devel@nongnu.org
Subject: [PATCH 0/3] target/arm: Add support for FEAT_SSBS
Date: Mon, 15 Feb 2021 14:58:16 -0700 [thread overview]
Message-ID: <20210215215819.1142-1-rebecca@nuviainc.com> (raw)
Add support for FEAT_SSBS, Speculative Store Bypass Safe. SSBS is an
optional feature in ARMv8.0 and is mandatory in ARMv8.5.
Rebecca Cran (3):
target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe
target/arm: Enable FEAT_SSBS for "max" AARCH64 CPU
target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPU
target/arm/cpu.c | 4 ++
target/arm/cpu.h | 15 +++++-
target/arm/cpu64.c | 5 ++
target/arm/helper-a64.c | 6 +++
target/arm/helper.c | 52 ++++++++++++++++++++
target/arm/internals.h | 6 +++
target/arm/translate-a64.c | 12 +++++
7 files changed, 99 insertions(+), 1 deletion(-)
--
2.26.2
next reply other threads:[~2021-02-15 21:59 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-15 21:58 Rebecca Cran [this message]
2021-02-15 21:58 ` [PATCH 1/3] target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe Rebecca Cran
2021-02-16 0:19 ` Richard Henderson
2021-02-16 2:15 ` Rebecca Cran
2021-02-15 21:58 ` [PATCH 2/3] target/arm: Enable FEAT_SSBS for "max" AARCH64 CPU Rebecca Cran
2021-02-16 0:20 ` Richard Henderson
2021-02-15 21:58 ` [PATCH 3/3] target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPU Rebecca Cran
2021-02-16 0:20 ` Richard Henderson
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