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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org,
	mike.leach@linaro.org, anshuman.khandual@arm.com,
	leo.yan@linaro.org, Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: [PATCH v4 17/19] coresight: core: Add support for dedicated percpu sinks
Date: Thu, 25 Feb 2021 19:35:41 +0000	[thread overview]
Message-ID: <20210225193543.2920532-18-suzuki.poulose@arm.com> (raw)
In-Reply-To: <20210225193543.2920532-1-suzuki.poulose@arm.com>

From: Anshuman Khandual <anshuman.khandual@arm.com>

Add support for dedicated sinks that are bound to individual CPUs. (e.g,
TRBE). To allow quicker access to the sink for a given CPU bound source,
keep a percpu array of the sink devices. Also, add support for building
a path to the CPU local sink from the ETM.

This adds a new percpu sink type CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM.
This new sink type is exclusively available and can only work with percpu
source type device CORESIGHT_DEV_SUBTYPE_SOURCE_PROC.

This defines a percpu structure that accommodates a single coresight_device
which can be used to store an initialized instance from a sink driver. As
these sinks are exclusively linked and dependent on corresponding percpu
sources devices, they should also be the default sink device during a perf
session.

Outwards device connections are scanned while establishing paths between a
source and a sink device. But such connections are not present for certain
percpu source and sink devices which are exclusively linked and dependent.
Build the path directly and skip connection scanning for such devices.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
[Moved the set/get percpu sink APIs from TRBE patch to here]
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
Changes:
 - Export methods to set/get percpu sinks for fixing module
   build for TRBE
 - Addressed coding style comments (Suzuki)
 - Check status of _coresight_build_path() (Mathieu)
---
 drivers/hwtracing/coresight/coresight-core.c | 29 ++++++++++++++++++--
 drivers/hwtracing/coresight/coresight-priv.h |  3 ++
 include/linux/coresight.h                    | 12 ++++++++
 3 files changed, 42 insertions(+), 2 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
index 0062c8935653..55c645616bf6 100644
--- a/drivers/hwtracing/coresight/coresight-core.c
+++ b/drivers/hwtracing/coresight/coresight-core.c
@@ -23,6 +23,7 @@
 #include "coresight-priv.h"
 
 static DEFINE_MUTEX(coresight_mutex);
+DEFINE_PER_CPU(struct coresight_device *, csdev_sink);
 
 /**
  * struct coresight_node - elements of a path, from source to sink
@@ -70,6 +71,18 @@ void coresight_remove_cti_ops(void)
 }
 EXPORT_SYMBOL_GPL(coresight_remove_cti_ops);
 
+void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev)
+{
+	per_cpu(csdev_sink, cpu) = csdev;
+}
+EXPORT_SYMBOL_GPL(coresight_set_percpu_sink);
+
+struct coresight_device *coresight_get_percpu_sink(int cpu)
+{
+	return per_cpu(csdev_sink, cpu);
+}
+EXPORT_SYMBOL_GPL(coresight_get_percpu_sink);
+
 static int coresight_id_match(struct device *dev, void *data)
 {
 	int trace_id, i_trace_id;
@@ -784,6 +797,14 @@ static int _coresight_build_path(struct coresight_device *csdev,
 	if (csdev == sink)
 		goto out;
 
+	if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) &&
+	    sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) {
+		if (_coresight_build_path(sink, sink, path) == 0) {
+			found = true;
+			goto out;
+		}
+	}
+
 	/* Not a sink - recursively explore each port found on this element */
 	for (i = 0; i < csdev->pdata->nr_outport; i++) {
 		struct coresight_device *child_dev;
@@ -999,8 +1020,12 @@ coresight_find_default_sink(struct coresight_device *csdev)
 	int depth = 0;
 
 	/* look for a default sink if we have not found for this device */
-	if (!csdev->def_sink)
-		csdev->def_sink = coresight_find_sink(csdev, &depth);
+	if (!csdev->def_sink) {
+		if (coresight_is_percpu_source(csdev))
+			csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev));
+		if (!csdev->def_sink)
+			csdev->def_sink = coresight_find_sink(csdev, &depth);
+	}
 	return csdev->def_sink;
 }
 
diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h
index f5f654ea2994..ff1dd2092ac5 100644
--- a/drivers/hwtracing/coresight/coresight-priv.h
+++ b/drivers/hwtracing/coresight/coresight-priv.h
@@ -232,4 +232,7 @@ coresight_find_csdev_by_fwnode(struct fwnode_handle *r_fwnode);
 void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev,
 				      struct coresight_device *ect_csdev);
 
+void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev);
+struct coresight_device *coresight_get_percpu_sink(int cpu);
+
 #endif
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 976ec2697610..8a3a3c199087 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -50,6 +50,7 @@ enum coresight_dev_subtype_sink {
 	CORESIGHT_DEV_SUBTYPE_SINK_PORT,
 	CORESIGHT_DEV_SUBTYPE_SINK_BUFFER,
 	CORESIGHT_DEV_SUBTYPE_SINK_SYSMEM,
+	CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM,
 };
 
 enum coresight_dev_subtype_link {
@@ -428,6 +429,17 @@ static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 o
 		csa->write(val, offset, false, true);
 }
 
+static inline bool coresight_is_percpu_source(struct coresight_device *csdev)
+{
+	return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SOURCE) &&
+	       (csdev->subtype.source_subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_PROC);
+}
+
+static inline bool coresight_is_percpu_sink(struct coresight_device *csdev)
+{
+	return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SINK) &&
+	       (csdev->subtype.sink_subtype == CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM);
+}
 #else	/* !CONFIG_64BIT */
 
 static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa,
-- 
2.24.1


WARNING: multiple messages have this Message-ID (diff)
From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: mathieu.poirier@linaro.org, anshuman.khandual@arm.com,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	linux-kernel@vger.kernel.org, leo.yan@linaro.org,
	mike.leach@linaro.org
Subject: [PATCH v4 17/19] coresight: core: Add support for dedicated percpu sinks
Date: Thu, 25 Feb 2021 19:35:41 +0000	[thread overview]
Message-ID: <20210225193543.2920532-18-suzuki.poulose@arm.com> (raw)
In-Reply-To: <20210225193543.2920532-1-suzuki.poulose@arm.com>

From: Anshuman Khandual <anshuman.khandual@arm.com>

Add support for dedicated sinks that are bound to individual CPUs. (e.g,
TRBE). To allow quicker access to the sink for a given CPU bound source,
keep a percpu array of the sink devices. Also, add support for building
a path to the CPU local sink from the ETM.

This adds a new percpu sink type CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM.
This new sink type is exclusively available and can only work with percpu
source type device CORESIGHT_DEV_SUBTYPE_SOURCE_PROC.

This defines a percpu structure that accommodates a single coresight_device
which can be used to store an initialized instance from a sink driver. As
these sinks are exclusively linked and dependent on corresponding percpu
sources devices, they should also be the default sink device during a perf
session.

Outwards device connections are scanned while establishing paths between a
source and a sink device. But such connections are not present for certain
percpu source and sink devices which are exclusively linked and dependent.
Build the path directly and skip connection scanning for such devices.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
[Moved the set/get percpu sink APIs from TRBE patch to here]
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
Changes:
 - Export methods to set/get percpu sinks for fixing module
   build for TRBE
 - Addressed coding style comments (Suzuki)
 - Check status of _coresight_build_path() (Mathieu)
---
 drivers/hwtracing/coresight/coresight-core.c | 29 ++++++++++++++++++--
 drivers/hwtracing/coresight/coresight-priv.h |  3 ++
 include/linux/coresight.h                    | 12 ++++++++
 3 files changed, 42 insertions(+), 2 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
index 0062c8935653..55c645616bf6 100644
--- a/drivers/hwtracing/coresight/coresight-core.c
+++ b/drivers/hwtracing/coresight/coresight-core.c
@@ -23,6 +23,7 @@
 #include "coresight-priv.h"
 
 static DEFINE_MUTEX(coresight_mutex);
+DEFINE_PER_CPU(struct coresight_device *, csdev_sink);
 
 /**
  * struct coresight_node - elements of a path, from source to sink
@@ -70,6 +71,18 @@ void coresight_remove_cti_ops(void)
 }
 EXPORT_SYMBOL_GPL(coresight_remove_cti_ops);
 
+void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev)
+{
+	per_cpu(csdev_sink, cpu) = csdev;
+}
+EXPORT_SYMBOL_GPL(coresight_set_percpu_sink);
+
+struct coresight_device *coresight_get_percpu_sink(int cpu)
+{
+	return per_cpu(csdev_sink, cpu);
+}
+EXPORT_SYMBOL_GPL(coresight_get_percpu_sink);
+
 static int coresight_id_match(struct device *dev, void *data)
 {
 	int trace_id, i_trace_id;
@@ -784,6 +797,14 @@ static int _coresight_build_path(struct coresight_device *csdev,
 	if (csdev == sink)
 		goto out;
 
+	if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) &&
+	    sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) {
+		if (_coresight_build_path(sink, sink, path) == 0) {
+			found = true;
+			goto out;
+		}
+	}
+
 	/* Not a sink - recursively explore each port found on this element */
 	for (i = 0; i < csdev->pdata->nr_outport; i++) {
 		struct coresight_device *child_dev;
@@ -999,8 +1020,12 @@ coresight_find_default_sink(struct coresight_device *csdev)
 	int depth = 0;
 
 	/* look for a default sink if we have not found for this device */
-	if (!csdev->def_sink)
-		csdev->def_sink = coresight_find_sink(csdev, &depth);
+	if (!csdev->def_sink) {
+		if (coresight_is_percpu_source(csdev))
+			csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev));
+		if (!csdev->def_sink)
+			csdev->def_sink = coresight_find_sink(csdev, &depth);
+	}
 	return csdev->def_sink;
 }
 
diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h
index f5f654ea2994..ff1dd2092ac5 100644
--- a/drivers/hwtracing/coresight/coresight-priv.h
+++ b/drivers/hwtracing/coresight/coresight-priv.h
@@ -232,4 +232,7 @@ coresight_find_csdev_by_fwnode(struct fwnode_handle *r_fwnode);
 void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev,
 				      struct coresight_device *ect_csdev);
 
+void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev);
+struct coresight_device *coresight_get_percpu_sink(int cpu);
+
 #endif
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 976ec2697610..8a3a3c199087 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -50,6 +50,7 @@ enum coresight_dev_subtype_sink {
 	CORESIGHT_DEV_SUBTYPE_SINK_PORT,
 	CORESIGHT_DEV_SUBTYPE_SINK_BUFFER,
 	CORESIGHT_DEV_SUBTYPE_SINK_SYSMEM,
+	CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM,
 };
 
 enum coresight_dev_subtype_link {
@@ -428,6 +429,17 @@ static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 o
 		csa->write(val, offset, false, true);
 }
 
+static inline bool coresight_is_percpu_source(struct coresight_device *csdev)
+{
+	return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SOURCE) &&
+	       (csdev->subtype.source_subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_PROC);
+}
+
+static inline bool coresight_is_percpu_sink(struct coresight_device *csdev)
+{
+	return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SINK) &&
+	       (csdev->subtype.sink_subtype == CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM);
+}
 #else	/* !CONFIG_64BIT */
 
 static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa,
-- 
2.24.1


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  parent reply	other threads:[~2021-02-25 19:50 UTC|newest]

Thread overview: 132+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-25 19:35 [PATCH v4 00/19] arm64: coresight: Add support for ETE and TRBE Suzuki K Poulose
2021-02-25 19:35 ` Suzuki K Poulose
2021-02-25 19:35 ` [PATCH v4 01/19] perf: aux: Add flags for the buffer format Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-02-25 19:35 ` [PATCH v4 02/19] perf: aux: Add CoreSight PMU buffer formats Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-03-16 17:04   ` Mathieu Poirier
2021-03-16 17:04     ` Mathieu Poirier
2021-03-22 12:29     ` Suzuki K Poulose
2021-03-22 12:29       ` Suzuki K Poulose
2021-02-25 19:35 ` [PATCH v4 03/19] kvm: arm64: Hide system instruction access to Trace registers Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-03-22 22:21   ` Suzuki K Poulose
2021-03-22 22:21     ` Suzuki K Poulose
2021-02-25 19:35 ` [PATCH v4 04/19] kvm: arm64: nvhe: Save the SPE context early Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-03-01 16:32   ` Alexandru Elisei
2021-03-01 16:32     ` Alexandru Elisei
2021-03-02 10:01     ` Suzuki K Poulose
2021-03-02 10:01       ` Suzuki K Poulose
2021-03-02 10:13       ` Marc Zyngier
2021-03-02 10:13         ` Marc Zyngier
2021-03-02 11:00       ` Alexandru Elisei
2021-03-02 11:00         ` Alexandru Elisei
2021-02-25 19:35 ` [PATCH v4 05/19] kvm: arm64: Disable guest access to trace filter controls Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-03-22 22:24   ` Suzuki K Poulose
2021-03-22 22:24     ` Suzuki K Poulose
2021-03-23  9:16     ` Marc Zyngier
2021-03-23  9:16       ` Marc Zyngier
2021-03-23  9:44       ` Suzuki K Poulose
2021-03-23  9:44         ` Suzuki K Poulose
2021-02-25 19:35 ` [PATCH v4 06/19] arm64: Add support for trace synchronization barrier Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-02-25 19:35 ` [PATCH v4 07/19] arm64: Add TRBE definitions Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-03-16 17:46   ` Mathieu Poirier
2021-03-16 17:46     ` Mathieu Poirier
2021-02-25 19:35 ` [PATCH v4 08/19] arm64: kvm: Enable access to TRBE support for host Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-03-16 17:49   ` Mathieu Poirier
2021-03-16 17:49     ` Mathieu Poirier
2021-02-25 19:35 ` [PATCH v4 09/19] coresight: etm4x: Move ETM to prohibited region for disable Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-03-08 17:25   ` Mike Leach
2021-03-08 17:25     ` Mike Leach
2021-03-16 19:30   ` Mathieu Poirier
2021-03-16 19:30     ` Mathieu Poirier
2021-03-17 10:44     ` Suzuki K Poulose
2021-03-17 10:44       ` Suzuki K Poulose
2021-03-17 17:09       ` Mathieu Poirier
2021-03-17 17:09         ` Mathieu Poirier
2021-03-22 21:28   ` Mathieu Poirier
2021-03-22 21:28     ` Mathieu Poirier
2021-02-25 19:35 ` [PATCH v4 10/19] coresight: etm-perf: Allow an event to use different sinks Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-03-08 17:25   ` Mike Leach
2021-03-08 17:25     ` Mike Leach
2021-03-16 20:23   ` Mathieu Poirier
2021-03-16 20:23     ` Mathieu Poirier
2021-03-17 10:47     ` Suzuki K Poulose
2021-03-17 10:47       ` Suzuki K Poulose
2021-02-25 19:35 ` [PATCH v4 11/19] coresight: Do not scan for graph if none is present Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-02-25 19:35 ` [PATCH v4 12/19] coresight: etm4x: Add support for PE OS lock Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-02-25 19:35 ` [PATCH v4 13/19] coresight: ete: Add support for ETE sysreg access Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-02-25 22:33   ` kernel test robot
2021-02-25 22:33     ` kernel test robot
2021-02-25 22:33     ` kernel test robot
2021-02-26  6:25   ` kernel test robot
2021-02-26  6:25     ` kernel test robot
2021-02-25 19:35 ` [PATCH v4 14/19] coresight: ete: Add support for ETE tracing Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-02-25 19:35 ` [PATCH v4 15/19] dts: bindings: Document device tree bindings for ETE Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-03-06 21:06   ` Rob Herring
2021-03-06 21:06     ` Rob Herring
2021-03-08 17:25     ` Mike Leach
2021-03-08 17:25       ` Mike Leach
2021-03-22 16:53     ` Suzuki K Poulose
2021-03-22 16:53       ` Suzuki K Poulose
2021-03-22 17:28       ` Rob Herring
2021-03-22 17:28         ` Rob Herring
2021-03-22 22:49         ` Suzuki K Poulose
2021-03-22 22:49           ` Suzuki K Poulose
2021-02-25 19:35 ` [PATCH v4 16/19] coresight: etm-perf: Handle stale output handles Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-02-25 19:35 ` Suzuki K Poulose [this message]
2021-02-25 19:35   ` [PATCH v4 17/19] coresight: core: Add support for dedicated percpu sinks Suzuki K Poulose
2021-02-26  6:34   ` kernel test robot
2021-02-26  6:34     ` kernel test robot
2021-02-26  6:34     ` kernel test robot
2021-03-01 13:54     ` Suzuki K Poulose
2021-03-01 13:54       ` Suzuki K Poulose
2021-03-01 13:54       ` Suzuki K Poulose
2021-03-02 10:21       ` Anshuman Khandual
2021-03-02 10:21         ` Anshuman Khandual
2021-03-02 10:21         ` Anshuman Khandual
2021-03-01 14:08   ` [PATCH v4.1 " Suzuki K Poulose
2021-03-01 14:08     ` Suzuki K Poulose
2021-03-08 17:26   ` [PATCH v4 " Mike Leach
2021-03-08 17:26     ` Mike Leach
2021-03-22 16:57     ` Suzuki K Poulose
2021-03-22 16:57       ` Suzuki K Poulose
2021-03-17 19:31   ` Mathieu Poirier
2021-03-17 19:31     ` Mathieu Poirier
2021-02-25 19:35 ` [PATCH v4 18/19] coresight: sink: Add TRBE driver Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose
2021-03-08 17:26   ` Mike Leach
2021-03-08 17:26     ` Mike Leach
2021-03-19 10:30     ` Suzuki K Poulose
2021-03-19 10:30       ` Suzuki K Poulose
2021-03-19 11:55       ` Mike Leach
2021-03-19 11:55         ` Mike Leach
2021-03-22 21:24         ` Mathieu Poirier
2021-03-22 21:24           ` Mathieu Poirier
2021-03-22 23:00           ` Suzuki K Poulose
2021-03-22 23:00             ` Suzuki K Poulose
2021-03-18 18:08   ` Mathieu Poirier
2021-03-18 18:08     ` Mathieu Poirier
2021-03-19 10:34     ` Suzuki K Poulose
2021-03-19 10:34       ` Suzuki K Poulose
2021-03-19 14:47       ` Mathieu Poirier
2021-03-19 14:47         ` Mathieu Poirier
2021-03-19 17:58   ` Mathieu Poirier
2021-03-19 17:58     ` Mathieu Poirier
2021-03-22 21:20   ` Mathieu Poirier
2021-03-22 21:20     ` Mathieu Poirier
2021-02-25 19:35 ` [PATCH v4 19/19] dts: bindings: Document device tree bindings for Arm TRBE Suzuki K Poulose
2021-02-25 19:35   ` Suzuki K Poulose

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