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From: Alistair Francis <alistair.francis@wdc.com>
To: peter.maydell@linaro.org
Cc: alistair23@gmail.com, "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	qemu-devel@nongnu.org, "Laurent Vivier" <laurent@vivier.eu>
Subject: [PULL v2 14/19] goldfish_rtc: re-arm the alarm after migration
Date: Thu,  4 Mar 2021 09:46:46 -0500	[thread overview]
Message-ID: <20210304144651.310037-15-alistair.francis@wdc.com> (raw)
In-Reply-To: <20210304144651.310037-1-alistair.francis@wdc.com>

From: Laurent Vivier <laurent@vivier.eu>

After a migration the clock offset is updated, but we also
need to re-arm the alarm if needed.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201220112615.933036-7-laurent@vivier.eu
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 hw/rtc/goldfish_rtc.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/hw/rtc/goldfish_rtc.c b/hw/rtc/goldfish_rtc.c
index 0f4e8185a7..e07ff0164e 100644
--- a/hw/rtc/goldfish_rtc.c
+++ b/hw/rtc/goldfish_rtc.c
@@ -211,6 +211,8 @@ static int goldfish_rtc_post_load(void *opaque, int version_id)
             qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
     s->tick_offset = s->tick_offset_vmstate - delta;
 
+    goldfish_rtc_set_alarm(s);
+
     return 0;
 }
 
-- 
2.30.1



  parent reply	other threads:[~2021-03-04 15:09 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-04 14:46 [PULL v2 00/19] riscv-to-apply queue Alistair Francis
2021-03-04 14:46 ` [PULL v2 01/19] target/riscv: Declare csr_ops[] with a known size Alistair Francis
2021-03-04 14:46 ` [PULL v2 02/19] hw/misc: sifive_u_otp: Use error_report() when block operation fails Alistair Francis
2021-03-04 14:46 ` [PULL v2 03/19] roms/opensbi: Upgrade from v0.8 to v0.9 Alistair Francis
2021-03-09 16:51   ` Philippe Mathieu-Daudé
2021-03-11 15:48     ` Alistair Francis
2021-03-04 14:46 ` [PULL v2 04/19] target-riscv: support QMP dump-guest-memory Alistair Francis
2021-03-04 14:46 ` [PULL v2 05/19] hw/block: m25p80: Add ISSI SPI flash support Alistair Francis
2021-03-04 14:46 ` [PULL v2 06/19] hw/block: m25p80: Add various ISSI flash information Alistair Francis
2021-03-04 14:46 ` [PULL v2 07/19] hw/ssi: Add SiFive SPI controller support Alistair Francis
2021-03-04 14:46 ` [PULL v2 08/19] hw/riscv: sifive_u: Add QSPI0 controller and connect a flash Alistair Francis
2021-03-04 14:46 ` [PULL v2 09/19] hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card Alistair Francis
2021-03-04 14:46 ` [PULL v2 10/19] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value Alistair Francis
2021-03-04 14:46 ` [PULL v2 11/19] docs/system: Sort targets in alphabetical order Alistair Francis
2021-03-04 14:46 ` [PULL v2 12/19] docs/system: Add RISC-V documentation Alistair Francis
2021-03-04 14:46 ` [PULL v2 13/19] docs/system: riscv: Add documentation for sifive_u machine Alistair Francis
2021-03-04 14:46 ` Alistair Francis [this message]
2021-03-04 14:46 ` [PULL v2 15/19] MAINTAINERS: Add a SiFive machine section Alistair Francis
2021-03-04 14:46 ` [PULL v2 16/19] hw/riscv: Drop 'struct MemmapEntry' Alistair Francis
2021-03-04 14:46 ` [PULL v2 17/19] hw/riscv: virt: Drop the 'link_up' parameter of gpex_pcie_init() Alistair Francis
2021-03-04 14:46 ` [PULL v2 18/19] hw/riscv: virt: Limit RAM size in a 32-bit system Alistair Francis
2021-03-04 14:46 ` [PULL v2 19/19] hw/riscv: virt: Map high mmio for PCIe Alistair Francis
2021-03-05 15:15 ` [PULL v2 00/19] riscv-to-apply queue Peter Maydell

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