From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Dinh Nguyen <dinguyen@kernel.org>, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Arnd Bergmann <arnd@arndb.de> Cc: linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Subject: [PATCH 3/3] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks Date: Mon, 8 Mar 2021 19:23:39 +0100 [thread overview] Message-ID: <20210308182339.379775-4-krzysztof.kozlowski@canonical.com> (raw) In-Reply-To: <20210308182339.379775-1-krzysztof.kozlowski@canonical.com> The Stratix 10 / Agilex / N5X clocks do not use anything other than OF or COMMON_CLK so they should be compile testable on most of the platforms. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- drivers/clk/Makefile | 5 +---- drivers/clk/socfpga/Kconfig | 22 ++++++++++++++++------ 2 files changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 12e46b12e587..9b582b3fca34 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -104,10 +104,7 @@ obj-y += renesas/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ -obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ -obj-$(CONFIG_ARCH_AGILEX) += socfpga/ -obj-$(CONFIG_ARCH_N5X) += socfpga/ -obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ +obj-y += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ obj-$(CONFIG_ARCH_STI) += st/ diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index 4922cc35f4cc..de7b3137e215 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -1,13 +1,23 @@ # SPDX-License-Identifier: GPL-2.0 +config COMMON_CLK_SOCFPGA + bool "Intel SoCFPGA family clock support" if COMPILE_TEST + depends on ARCH_AGILEX || ARCH_N5X || ARCH_SOCFPGA || ARCH_STRATIX10 || COMPILE_TEST + default y if ARCH_AGILEX || ARCH_N5X || ARCH_SOCFPGA || ARCH_STRATIX10 + help + Support for the clock controllers present on Intel SoCFPGA and eASIC + devices like Stratix 10, Agilex and N5X eASIC. + +if COMMON_CLK_SOCFPGA + config COMMON_CLK_STRATIX10 - bool - # Intel Stratix / Agilex / N5X clock controller support + bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST default y if ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 - depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 + depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 || COMPILE_TEST config COMMON_CLK_AGILEX - bool - # Intel Agilex / N5X clock controller support + bool "Intel Agilex / N5X clock controller support" if COMPILE_TEST default y if ARCH_AGILEX || ARCH_N5X - depends on ARCH_AGILEX || ARCH_N5X + depends on ARCH_AGILEX || ARCH_N5X || COMPILE_TEST select COMMON_CLK_STRATIX10 + +endif # COMMON_CLK_SOCFPGA -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Dinh Nguyen <dinguyen@kernel.org>, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Arnd Bergmann <arnd@arndb.de> Cc: linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Subject: [PATCH 3/3] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks Date: Mon, 8 Mar 2021 19:23:39 +0100 [thread overview] Message-ID: <20210308182339.379775-4-krzysztof.kozlowski@canonical.com> (raw) In-Reply-To: <20210308182339.379775-1-krzysztof.kozlowski@canonical.com> The Stratix 10 / Agilex / N5X clocks do not use anything other than OF or COMMON_CLK so they should be compile testable on most of the platforms. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- drivers/clk/Makefile | 5 +---- drivers/clk/socfpga/Kconfig | 22 ++++++++++++++++------ 2 files changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 12e46b12e587..9b582b3fca34 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -104,10 +104,7 @@ obj-y += renesas/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ -obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ -obj-$(CONFIG_ARCH_AGILEX) += socfpga/ -obj-$(CONFIG_ARCH_N5X) += socfpga/ -obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ +obj-y += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ obj-$(CONFIG_ARCH_STI) += st/ diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index 4922cc35f4cc..de7b3137e215 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -1,13 +1,23 @@ # SPDX-License-Identifier: GPL-2.0 +config COMMON_CLK_SOCFPGA + bool "Intel SoCFPGA family clock support" if COMPILE_TEST + depends on ARCH_AGILEX || ARCH_N5X || ARCH_SOCFPGA || ARCH_STRATIX10 || COMPILE_TEST + default y if ARCH_AGILEX || ARCH_N5X || ARCH_SOCFPGA || ARCH_STRATIX10 + help + Support for the clock controllers present on Intel SoCFPGA and eASIC + devices like Stratix 10, Agilex and N5X eASIC. + +if COMMON_CLK_SOCFPGA + config COMMON_CLK_STRATIX10 - bool - # Intel Stratix / Agilex / N5X clock controller support + bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST default y if ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 - depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 + depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 || COMPILE_TEST config COMMON_CLK_AGILEX - bool - # Intel Agilex / N5X clock controller support + bool "Intel Agilex / N5X clock controller support" if COMPILE_TEST default y if ARCH_AGILEX || ARCH_N5X - depends on ARCH_AGILEX || ARCH_N5X + depends on ARCH_AGILEX || ARCH_N5X || COMPILE_TEST select COMMON_CLK_STRATIX10 + +endif # COMMON_CLK_SOCFPGA -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-03-08 18:24 UTC|newest] Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-03-08 18:23 [RFT 0/3] clk: socfpga: minor cleanups and compile testing Krzysztof Kozlowski 2021-03-08 18:23 ` Krzysztof Kozlowski 2021-03-08 18:23 ` [PATCH 1/3] clk: socfpga: allow building N5X clocks with ARCH_N5X Krzysztof Kozlowski 2021-03-08 18:23 ` Krzysztof Kozlowski 2021-03-08 18:23 ` [PATCH 2/3] clk: socfpga: drop duplicated lines in Makefile Krzysztof Kozlowski 2021-03-08 18:23 ` Krzysztof Kozlowski 2021-03-08 18:23 ` Krzysztof Kozlowski [this message] 2021-03-08 18:23 ` [PATCH 3/3] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks Krzysztof Kozlowski 2021-03-09 0:00 ` kernel test robot 2021-03-09 8:49 ` Krzysztof Kozlowski 2021-03-09 8:49 ` Krzysztof Kozlowski 2021-03-09 9:02 ` Krzysztof Kozlowski 2021-03-09 9:02 ` Krzysztof Kozlowski 2021-03-09 10:11 ` Arnd Bergmann 2021-03-09 10:11 ` Arnd Bergmann
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