From: Kishon Vijay Abraham I <kishon@ti.com> To: Kishon Vijay Abraham I <kishon@ti.com>, Vinod Koul <vkoul@kernel.org>, Swapnil Jakhade <sjakhade@cadence.com> Cc: <linux-kernel@vger.kernel.org>, <linux-phy@lists.infradead.org>, Lokesh Vutla <lokeshvutla@ti.com> Subject: [PATCH v3 2/6] phy: ti: j721e-wiz: Delete "clk_div_sel" clk provider during cleanup Date: Wed, 10 Mar 2021 17:38:36 +0530 [thread overview] Message-ID: <20210310120840.16447-3-kishon@ti.com> (raw) In-Reply-To: <20210310120840.16447-1-kishon@ti.com> commit 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") modeled both MUX clocks and DIVIDER clocks in wiz. However during cleanup, it removed only the MUX clock provider. Remove the DIVIDER clock provider here. Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- drivers/phy/ti/phy-j721e-wiz.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c index 956a93d96d9b..1a4e09a394a8 100644 --- a/drivers/phy/ti/phy-j721e-wiz.c +++ b/drivers/phy/ti/phy-j721e-wiz.c @@ -608,6 +608,12 @@ static void wiz_clock_cleanup(struct wiz *wiz, struct device_node *node) of_clk_del_provider(clk_node); of_node_put(clk_node); } + + for (i = 0; i < wiz->clk_div_sel_num; i++) { + clk_node = of_get_child_by_name(node, clk_div_sel[i].node_name); + of_clk_del_provider(clk_node); + of_node_put(clk_node); + } } static int wiz_clock_init(struct wiz *wiz, struct device_node *node) -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com> To: Kishon Vijay Abraham I <kishon@ti.com>, Vinod Koul <vkoul@kernel.org>, Swapnil Jakhade <sjakhade@cadence.com> Cc: <linux-kernel@vger.kernel.org>, <linux-phy@lists.infradead.org>, Lokesh Vutla <lokeshvutla@ti.com> Subject: [PATCH v3 2/6] phy: ti: j721e-wiz: Delete "clk_div_sel" clk provider during cleanup Date: Wed, 10 Mar 2021 17:38:36 +0530 [thread overview] Message-ID: <20210310120840.16447-3-kishon@ti.com> (raw) In-Reply-To: <20210310120840.16447-1-kishon@ti.com> commit 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") modeled both MUX clocks and DIVIDER clocks in wiz. However during cleanup, it removed only the MUX clock provider. Remove the DIVIDER clock provider here. Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- drivers/phy/ti/phy-j721e-wiz.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c index 956a93d96d9b..1a4e09a394a8 100644 --- a/drivers/phy/ti/phy-j721e-wiz.c +++ b/drivers/phy/ti/phy-j721e-wiz.c @@ -608,6 +608,12 @@ static void wiz_clock_cleanup(struct wiz *wiz, struct device_node *node) of_clk_del_provider(clk_node); of_node_put(clk_node); } + + for (i = 0; i < wiz->clk_div_sel_num; i++) { + clk_node = of_get_child_by_name(node, clk_div_sel[i].node_name); + of_clk_del_provider(clk_node); + of_node_put(clk_node); + } } static int wiz_clock_init(struct wiz *wiz, struct device_node *node) -- 2.17.1 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2021-03-10 12:09 UTC|newest] Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-03-10 12:08 [PATCH v3 0/6] AM64: Add SERDES driver support Kishon Vijay Abraham I 2021-03-10 12:08 ` Kishon Vijay Abraham I 2021-03-10 12:08 ` [PATCH v3 1/6] phy: ti: j721e-wiz: Remove "regmap_field" from wiz_clk_{mux|div}_sel Kishon Vijay Abraham I 2021-03-10 12:08 ` Kishon Vijay Abraham I 2021-03-10 12:08 ` Kishon Vijay Abraham I [this message] 2021-03-10 12:08 ` [PATCH v3 2/6] phy: ti: j721e-wiz: Delete "clk_div_sel" clk provider during cleanup Kishon Vijay Abraham I 2021-03-10 12:08 ` [PATCH v3 3/6] phy: ti: j721e-wiz: Configure full rate divider for AM64 Kishon Vijay Abraham I 2021-03-10 12:08 ` Kishon Vijay Abraham I 2021-03-10 12:08 ` [PATCH v3 4/6] phy: ti: j721e-wiz: Model the internal clocks without device tree input Kishon Vijay Abraham I 2021-03-10 12:08 ` Kishon Vijay Abraham I 2021-03-10 14:22 ` kernel test robot 2021-03-10 14:22 ` kernel test robot 2021-03-10 14:22 ` kernel test robot 2021-03-10 15:25 ` kernel test robot 2021-03-10 15:25 ` kernel test robot 2021-03-10 15:25 ` kernel test robot 2021-03-10 12:08 ` [PATCH v3 5/6] phy: ti: j721e-wiz: Enable reference clock output in cmn_refclk_<p/m> Kishon Vijay Abraham I 2021-03-10 12:08 ` Kishon Vijay Abraham I 2021-03-10 12:08 ` [PATCH v3 6/6] phy: cadence-torrent: Add support to drive refclk out Kishon Vijay Abraham I 2021-03-10 12:08 ` Kishon Vijay Abraham I 2021-03-10 14:08 ` kernel test robot 2021-03-10 14:08 ` kernel test robot 2021-03-10 14:08 ` kernel test robot 2021-03-10 14:52 ` kernel test robot 2021-03-10 14:52 ` kernel test robot 2021-03-10 14:52 ` kernel test robot 2021-03-15 5:44 ` Swapnil Kashinath Jakhade 2021-03-15 5:44 ` Swapnil Kashinath Jakhade 2021-03-10 14:28 ` [PATCH v3 0/6] AM64: Add SERDES driver support Kishon Vijay Abraham I 2021-03-10 14:28 ` Kishon Vijay Abraham I 2021-03-30 18:04 ` Vinod Koul 2021-03-30 18:04 ` Vinod Koul
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