From: Angelo Dureghello <angelo@kernel-space.org>
To: wg@grandegger.com
Cc: qiangqing.zhang@nxp.com, mkl@pengutronix.de,
linux-can@vger.kernel.org,
Angelo Dureghello <angelo@kernel-space.org>
Subject: [PATCH] can: flexcan: fix chip freeze for missing bitrate
Date: Tue, 16 Mar 2021 00:15:10 +0100 [thread overview]
Message-ID: <20210315231510.650593-1-angelo@kernel-space.org> (raw)
For cases when flexcan is built-in, bitrate is still not set
at registering. So flexcan_chip_freeze() generates:
[ 1.860000] *** ZERO DIVIDE *** FORMAT=4
[ 1.860000] Current process id is 1
[ 1.860000] BAD KERNEL TRAP: 00000000
[ 1.860000] PC: [<402e70c8>] flexcan_chip_freeze+0x1a/0xa8
To allow chip freeze, using an hardcoded timeout when bitrate is still
not set.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
---
drivers/net/can/flexcan.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 134c05757a3b..bb41ff3d2d1e 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -697,9 +697,13 @@ static int flexcan_chip_disable(struct flexcan_priv *priv)
static int flexcan_chip_freeze(struct flexcan_priv *priv)
{
struct flexcan_regs __iomem *regs = priv->regs;
- unsigned int timeout = 1000 * 1000 * 10 / priv->can.bittiming.bitrate;
+ unsigned int timeout;
+ u32 bitrate = priv->can.bittiming.bitrate;
u32 reg;
+ timeout = bitrate ? 1000 * 1000 * 10 / bitrate :
+ FLEXCAN_TIMEOUT_US / 10;
+
reg = priv->read(®s->mcr);
reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT;
priv->write(reg, ®s->mcr);
--
2.30.1
next reply other threads:[~2021-03-15 23:22 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-15 23:15 Angelo Dureghello [this message]
2021-03-16 7:46 ` [PATCH] can: flexcan: fix chip freeze for missing bitrate Marc Kleine-Budde
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