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From: Emil Velikov <emil.l.velikov@gmail.com>
To: kernel@collabora.com, Ezequiel Garcia <ezequiel@collabora.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-media@vger.kernel.org,
	linux-rockchip@lists.infradead.org
Cc: emil.l.velikov@gmail.com
Subject: [PATCH v3 1/9] media: hantro: use G1_REG_INTERRUPT directly for the mpeg2
Date: Wed, 31 Mar 2021 18:35:12 +0100	[thread overview]
Message-ID: <20210331173520.184191-2-emil.l.velikov@gmail.com> (raw)
In-Reply-To: <20210331173520.184191-1-emil.l.velikov@gmail.com>

From: Emil Velikov <emil.velikov@collabora.com>

Use the register directly over the existing SWREG().

Ideally we'll port the driver away from the local registers, but for
now this is enough. For context - I was reading through the IRQ register
handling across the variants.

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
index 6386a3989bfe..0fd306806f16 100644
--- a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
+++ b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
@@ -10,6 +10,7 @@
 #include <media/v4l2-mem2mem.h>
 #include "hantro.h"
 #include "hantro_hw.h"
+#include "hantro_g1_regs.h"
 
 #define G1_SWREG(nr)			((nr) * 4)
 
@@ -20,7 +21,6 @@
 #define G1_REG_REFER2_BASE		G1_SWREG(16)
 #define G1_REG_REFER3_BASE		G1_SWREG(17)
 #define G1_REG_QTABLE_BASE		G1_SWREG(40)
-#define G1_REG_DEC_E(v)			((v) ? BIT(0) : 0)
 
 #define G1_REG_DEC_AXI_RD_ID(v)		(((v) << 24) & GENMASK(31, 24))
 #define G1_REG_DEC_TIMEOUT_E(v)		((v) ? BIT(23) : 0)
@@ -246,6 +246,5 @@ void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx)
 
 	hantro_end_prepare_run(ctx);
 
-	reg = G1_REG_DEC_E(1);
-	vdpu_write(vpu, reg, G1_SWREG(1));
+	vdpu_write(vpu, G1_REG_INTERRUPT_DEC_E, G1_REG_INTERRUPT);
 }
-- 
2.31.1


WARNING: multiple messages have this Message-ID (diff)
From: Emil Velikov <emil.l.velikov@gmail.com>
To: kernel@collabora.com, Ezequiel Garcia <ezequiel@collabora.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-media@vger.kernel.org,
	linux-rockchip@lists.infradead.org
Cc: emil.l.velikov@gmail.com
Subject: [PATCH v3 1/9] media: hantro: use G1_REG_INTERRUPT directly for the mpeg2
Date: Wed, 31 Mar 2021 18:35:12 +0100	[thread overview]
Message-ID: <20210331173520.184191-2-emil.l.velikov@gmail.com> (raw)
In-Reply-To: <20210331173520.184191-1-emil.l.velikov@gmail.com>

From: Emil Velikov <emil.velikov@collabora.com>

Use the register directly over the existing SWREG().

Ideally we'll port the driver away from the local registers, but for
now this is enough. For context - I was reading through the IRQ register
handling across the variants.

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
index 6386a3989bfe..0fd306806f16 100644
--- a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
+++ b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
@@ -10,6 +10,7 @@
 #include <media/v4l2-mem2mem.h>
 #include "hantro.h"
 #include "hantro_hw.h"
+#include "hantro_g1_regs.h"
 
 #define G1_SWREG(nr)			((nr) * 4)
 
@@ -20,7 +21,6 @@
 #define G1_REG_REFER2_BASE		G1_SWREG(16)
 #define G1_REG_REFER3_BASE		G1_SWREG(17)
 #define G1_REG_QTABLE_BASE		G1_SWREG(40)
-#define G1_REG_DEC_E(v)			((v) ? BIT(0) : 0)
 
 #define G1_REG_DEC_AXI_RD_ID(v)		(((v) << 24) & GENMASK(31, 24))
 #define G1_REG_DEC_TIMEOUT_E(v)		((v) ? BIT(23) : 0)
@@ -246,6 +246,5 @@ void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx)
 
 	hantro_end_prepare_run(ctx);
 
-	reg = G1_REG_DEC_E(1);
-	vdpu_write(vpu, reg, G1_SWREG(1));
+	vdpu_write(vpu, G1_REG_INTERRUPT_DEC_E, G1_REG_INTERRUPT);
 }
-- 
2.31.1


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  reply	other threads:[~2021-03-31 17:36 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-31 17:35 [PATCH v3 0/9] Microchip SAMA5D4 VPU support et al Emil Velikov
2021-03-31 17:35 ` Emil Velikov
2021-03-31 17:35 ` Emil Velikov [this message]
2021-03-31 17:35   ` [PATCH v3 1/9] media: hantro: use G1_REG_INTERRUPT directly for the mpeg2 Emil Velikov
2021-03-31 17:35 ` [PATCH v3 2/9] media: hantro: imx: reuse MB_DIM define Emil Velikov
2021-03-31 17:35   ` Emil Velikov
2021-03-31 17:35 ` [PATCH v3 3/9] media: hantro: imx: remove duplicate dec_base init Emil Velikov
2021-03-31 17:35   ` Emil Velikov
2021-03-31 17:35 ` [PATCH v3 4/9] media: hantro: imx: remove unused include Emil Velikov
2021-03-31 17:35   ` Emil Velikov
2021-03-31 17:35 ` [PATCH v3 5/9] media: hantro: introduce hantro_g1.c for common API Emil Velikov
2021-03-31 17:35   ` Emil Velikov
2021-03-31 17:35 ` [PATCH v3 6/9] media: hantro: add fallback handling for single irq/clk Emil Velikov
2021-03-31 17:35   ` Emil Velikov
2021-03-31 19:57   ` Ezequiel Garcia
2021-03-31 19:57     ` Ezequiel Garcia
2021-03-31 17:35 ` [PATCH v3 7/9] media: dt-bindings: Document SAMA5D4 VDEC bindings Emil Velikov
2021-03-31 17:35   ` Emil Velikov
2021-03-31 18:48   ` [PATCH v3.5 " Emil Velikov
2021-03-31 18:48     ` Emil Velikov
2021-03-31 18:53   ` [PATCH v3 " Emil Velikov
2021-03-31 18:53     ` Emil Velikov
2021-03-31 17:35 ` [PATCH v3 8/9] media: hantro: add initial SAMA5D4 support Emil Velikov
2021-03-31 17:35   ` Emil Velikov
2021-03-31 20:03   ` Ezequiel Garcia
2021-03-31 20:03     ` Ezequiel Garcia
2021-04-01 13:54     ` Emil Velikov
2021-04-01 13:54       ` Emil Velikov
2021-03-31 17:35 ` [PATCH v3 9/9] ARM: dts: sama5d4: enable Hantro G1 VDEC Emil Velikov
2021-03-31 17:35   ` Emil Velikov

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