From: Chen Lifu <chenlifu@huawei.com> To: Viresh Kumar <vireshk@kernel.org>, Shiraz Hashim <shiraz.linux.kernel@gmail.com>, Russell King <linux@armlinux.org.uk> Cc: Chen Lifu <chenlifu@huawei.com>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <kernel-janitors@vger.kernel.org> Subject: [PATCH -next] ARM: spear: Fix build error with CONFIG_ARCH_SPEAR3XX Date: Fri, 9 Apr 2021 09:55:15 +0800 [thread overview] Message-ID: <20210409015515.258653-1-chenlifu@huawei.com> (raw) commit 77f983a9df42 ("spi: pl022: Use GPIOs looked up by the core") deleted 'struct pl022_ssp_controller' member 'num_chipselect'. We get build error when CONFIG_ARCH_SPEAR3XX is set: arch/arm/mach-spear/spear3xx.c:42:3: error: 'struct pl022_ssp_controller' has no member named 'num_chipselect' 42 | .num_chipselect = 2, | ^~~~~~~~~~~~~~ arch/arm/mach-spear/spear3xx.c:42:20: warning: initialization of 'void *' from 'int' makes pointer from integer without a cast [-Wint-conversion] 42 | .num_chipselect = 2, | ^ Fix the issue by deleting the initialization of 'num_chipselect' in spear3xx.c. Fixes: 77f983a9df42 ("spi: pl022: Use GPIOs looked up by the core") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Chen Lifu <chenlifu@huawei.com> --- arch/arm/mach-spear/spear3xx.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/arch/arm/mach-spear/spear3xx.c b/arch/arm/mach-spear/spear3xx.c index 8537fcffe5a8..f83321d5e353 100644 --- a/arch/arm/mach-spear/spear3xx.c +++ b/arch/arm/mach-spear/spear3xx.c @@ -30,16 +30,6 @@ struct pl022_ssp_controller pl022_plat_data = { .dma_filter = pl08x_filter_id, .dma_tx_param = "ssp0_tx", .dma_rx_param = "ssp0_rx", - /* - * This is number of spi devices that can be connected to spi. There are - * two type of chipselects on which slave devices can work. One is chip - * select provided by spi masters other is controlled through external - * gpio's. We can't use chipselect provided from spi master (because as - * soon as FIFO becomes empty, CS is disabled and transfer ends). So - * this number now depends on number of gpios available for spi. each - * slave on each master requires a separate gpio pin. - */ - .num_chipselect = 2, }; /* dmac device registration */
WARNING: multiple messages have this Message-ID (diff)
From: Chen Lifu <chenlifu@huawei.com> To: Viresh Kumar <vireshk@kernel.org>, Shiraz Hashim <shiraz.linux.kernel@gmail.com>, Russell King <linux@armlinux.org.uk> Cc: Chen Lifu <chenlifu@huawei.com>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <kernel-janitors@vger.kernel.org> Subject: [PATCH -next] ARM: spear: Fix build error with CONFIG_ARCH_SPEAR3XX Date: Fri, 9 Apr 2021 09:55:15 +0800 [thread overview] Message-ID: <20210409015515.258653-1-chenlifu@huawei.com> (raw) commit 77f983a9df42 ("spi: pl022: Use GPIOs looked up by the core") deleted 'struct pl022_ssp_controller' member 'num_chipselect'. We get build error when CONFIG_ARCH_SPEAR3XX is set: arch/arm/mach-spear/spear3xx.c:42:3: error: 'struct pl022_ssp_controller' has no member named 'num_chipselect' 42 | .num_chipselect = 2, | ^~~~~~~~~~~~~~ arch/arm/mach-spear/spear3xx.c:42:20: warning: initialization of 'void *' from 'int' makes pointer from integer without a cast [-Wint-conversion] 42 | .num_chipselect = 2, | ^ Fix the issue by deleting the initialization of 'num_chipselect' in spear3xx.c. Fixes: 77f983a9df42 ("spi: pl022: Use GPIOs looked up by the core") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Chen Lifu <chenlifu@huawei.com> --- arch/arm/mach-spear/spear3xx.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/arch/arm/mach-spear/spear3xx.c b/arch/arm/mach-spear/spear3xx.c index 8537fcffe5a8..f83321d5e353 100644 --- a/arch/arm/mach-spear/spear3xx.c +++ b/arch/arm/mach-spear/spear3xx.c @@ -30,16 +30,6 @@ struct pl022_ssp_controller pl022_plat_data = { .dma_filter = pl08x_filter_id, .dma_tx_param = "ssp0_tx", .dma_rx_param = "ssp0_rx", - /* - * This is number of spi devices that can be connected to spi. There are - * two type of chipselects on which slave devices can work. One is chip - * select provided by spi masters other is controlled through external - * gpio's. We can't use chipselect provided from spi master (because as - * soon as FIFO becomes empty, CS is disabled and transfer ends). So - * this number now depends on number of gpios available for spi. each - * slave on each master requires a separate gpio pin. - */ - .num_chipselect = 2, }; /* dmac device registration */ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2021-04-09 1:56 UTC|newest] Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-09 1:55 Chen Lifu [this message] 2021-04-09 1:55 ` [PATCH -next] ARM: spear: Fix build error with CONFIG_ARCH_SPEAR3XX Chen Lifu 2021-04-09 4:03 ` Viresh Kumar 2021-04-09 4:03 ` Viresh Kumar 2021-04-09 6:51 ` chenlifu 2021-04-09 6:51 ` chenlifu
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210409015515.258653-1-chenlifu@huawei.com \ --to=chenlifu@huawei.com \ --cc=kernel-janitors@vger.kernel.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux@armlinux.org.uk \ --cc=shiraz.linux.kernel@gmail.com \ --cc=vireshk@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.