From: Matthew Auld <matthew.auld@intel.com> To: intel-gfx@lists.freedesktop.org Cc: Caz Yokoyama <Caz.Yokoyama@intel.com>, dri-devel@lists.freedesktop.org Subject: [PATCH 09/19] drm/i915/lmem: Fail driver init if LMEM training failed Date: Mon, 12 Apr 2021 10:05:16 +0100 [thread overview] Message-ID: <20210412090526.30547-10-matthew.auld@intel.com> (raw) In-Reply-To: <20210412090526.30547-1-matthew.auld@intel.com> From: Matt Roper <matthew.d.roper@intel.com> Boot firmware performs memory training and health assessment during startup. If the memory training fails, the firmware will consider the GPU unusable and will instruct the punit to keep the GT powered down. If this happens, our driver will be unable to communicate with the GT (all GT registers will read back as 0, forcewake requests will timeout, etc.) so we should abort driver initialization if this happens. We can confirm that LMEM was initialized successfully via sgunit register GU_CNTL. Bspec: 53111 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Cc: Caz Yokoyama <Caz.Yokoyama@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_uncore.c | 12 ++++++++++++ 2 files changed, 15 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 4108f2a7ebfa..da73dc939e58 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -487,6 +487,9 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define GAB_CTL _MMIO(0x24000) #define GAB_CTL_CONT_AFTER_PAGEFAULT (1 << 8) +#define GU_CNTL _MMIO(0x101010) +#define LMEM_INIT REG_BIT(7) + #define GEN6_STOLEN_RESERVED _MMIO(0x1082C0) #define GEN6_STOLEN_RESERVED_ADDR_MASK (0xFFF << 20) #define GEN7_STOLEN_RESERVED_ADDR_MASK (0x3FFF << 18) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 661b50191f2b..4d0605757428 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1917,6 +1917,18 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore) if (ret) return ret; + /* + * The boot firmware initializes local memory and assesses its health. + * If memory training fails, the punit will have been instructed to + * keep the GT powered down; we won't be able to communicate with it + * and we should not continue with driver initialization. + */ + if (IS_DGFX(i915) && + !(__raw_uncore_read32(uncore, GU_CNTL) & LMEM_INIT)) { + drm_err(&i915->drm, "LMEM not initialized by firmware\n"); + return -ENODEV; + } + if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915)) uncore->flags |= UNCORE_HAS_FORCEWAKE; -- 2.26.3 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Matthew Auld <matthew.auld@intel.com> To: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 09/19] drm/i915/lmem: Fail driver init if LMEM training failed Date: Mon, 12 Apr 2021 10:05:16 +0100 [thread overview] Message-ID: <20210412090526.30547-10-matthew.auld@intel.com> (raw) In-Reply-To: <20210412090526.30547-1-matthew.auld@intel.com> From: Matt Roper <matthew.d.roper@intel.com> Boot firmware performs memory training and health assessment during startup. If the memory training fails, the firmware will consider the GPU unusable and will instruct the punit to keep the GT powered down. If this happens, our driver will be unable to communicate with the GT (all GT registers will read back as 0, forcewake requests will timeout, etc.) so we should abort driver initialization if this happens. We can confirm that LMEM was initialized successfully via sgunit register GU_CNTL. Bspec: 53111 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Cc: Caz Yokoyama <Caz.Yokoyama@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_uncore.c | 12 ++++++++++++ 2 files changed, 15 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 4108f2a7ebfa..da73dc939e58 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -487,6 +487,9 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define GAB_CTL _MMIO(0x24000) #define GAB_CTL_CONT_AFTER_PAGEFAULT (1 << 8) +#define GU_CNTL _MMIO(0x101010) +#define LMEM_INIT REG_BIT(7) + #define GEN6_STOLEN_RESERVED _MMIO(0x1082C0) #define GEN6_STOLEN_RESERVED_ADDR_MASK (0xFFF << 20) #define GEN7_STOLEN_RESERVED_ADDR_MASK (0x3FFF << 18) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 661b50191f2b..4d0605757428 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1917,6 +1917,18 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore) if (ret) return ret; + /* + * The boot firmware initializes local memory and assesses its health. + * If memory training fails, the punit will have been instructed to + * keep the GT powered down; we won't be able to communicate with it + * and we should not continue with driver initialization. + */ + if (IS_DGFX(i915) && + !(__raw_uncore_read32(uncore, GU_CNTL) & LMEM_INIT)) { + drm_err(&i915->drm, "LMEM not initialized by firmware\n"); + return -ENODEV; + } + if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915)) uncore->flags |= UNCORE_HAS_FORCEWAKE; -- 2.26.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-04-12 9:09 UTC|newest] Thread overview: 132+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-12 9:05 [PATCH 00/19] More DG1 enabling Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 9:05 ` [PATCH 01/19] drm/i915/gt: Skip aperture remapping selftest where there is no aperture Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 14:48 ` Daniel Vetter 2021-04-12 14:48 ` Daniel Vetter 2021-04-12 9:05 ` [PATCH 02/19] drm/i915/selftests: Only query RAPL for integrated power measurements Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 9:05 ` [PATCH 03/19] drm/i915: Create stolen memory region from local memory Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:01 ` Tvrtko Ursulin 2021-04-14 15:01 ` Tvrtko Ursulin 2021-04-16 15:04 ` Matthew Auld 2021-04-16 15:04 ` Matthew Auld 2021-04-19 14:15 ` Tvrtko Ursulin 2021-04-19 14:15 ` Tvrtko Ursulin 2021-04-12 9:05 ` [PATCH 04/19] drm/i915/stolen: treat stolen local as normal " Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:06 ` Tvrtko Ursulin 2021-04-14 15:06 ` Tvrtko Ursulin 2021-04-12 9:05 ` [PATCH 05/19] drm/i915/stolen: enforce the min_page_size contract Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:07 ` Tvrtko Ursulin 2021-04-14 15:07 ` Tvrtko Ursulin 2021-04-12 9:05 ` [PATCH 06/19] drm/i915/stolen: pass the allocation flags Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:09 ` Tvrtko Ursulin 2021-04-14 15:09 ` Tvrtko Ursulin 2021-04-16 13:53 ` Matthew Auld 2021-04-16 13:53 ` Matthew Auld 2021-04-12 9:05 ` [PATCH 07/19] drm/i915/fbdev: Use lmem physical addresses for fb_mmap() on discrete Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 15:00 ` Daniel Vetter 2021-04-12 15:00 ` [Intel-gfx] " Daniel Vetter 2021-04-12 9:05 ` [PATCH 08/19] drm/i915: Return error value when bo not in LMEM for discrete Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:16 ` Tvrtko Ursulin 2021-04-14 15:16 ` Tvrtko Ursulin 2021-04-12 9:05 ` Matthew Auld [this message] 2021-04-12 9:05 ` [Intel-gfx] [PATCH 09/19] drm/i915/lmem: Fail driver init if LMEM training failed Matthew Auld 2021-04-12 9:05 ` [PATCH 10/19] drm/i915/dg1: Fix mapping type for default state object Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 9:05 ` [PATCH 11/19] drm/i915: Update the helper to set correct mapping Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:22 ` Tvrtko Ursulin 2021-04-14 15:22 ` Tvrtko Ursulin 2021-04-14 16:20 ` Matthew Auld 2021-04-14 16:20 ` Matthew Auld 2021-04-15 8:20 ` Tvrtko Ursulin 2021-04-15 8:20 ` Tvrtko Ursulin 2021-04-15 9:23 ` Matthew Auld 2021-04-15 9:23 ` Matthew Auld 2021-04-15 11:05 ` Tvrtko Ursulin 2021-04-15 11:05 ` Tvrtko Ursulin 2021-04-19 11:30 ` Matthew Auld 2021-04-19 11:30 ` Matthew Auld 2021-04-19 14:07 ` Tvrtko Ursulin 2021-04-19 14:07 ` Tvrtko Ursulin 2021-04-19 14:37 ` Matthew Auld 2021-04-19 14:37 ` Matthew Auld 2021-04-19 15:01 ` Tvrtko Ursulin 2021-04-19 15:01 ` Tvrtko Ursulin 2021-04-21 11:42 ` Matthew Auld 2021-04-21 11:42 ` Matthew Auld 2021-04-21 15:41 ` Tvrtko Ursulin 2021-04-21 15:41 ` Tvrtko Ursulin 2021-04-21 19:13 ` Matthew Auld 2021-04-21 19:13 ` Matthew Auld 2021-04-26 8:57 ` Matthew Auld 2021-04-26 8:57 ` Matthew Auld 2021-04-26 9:21 ` Tvrtko Ursulin 2021-04-26 9:21 ` Tvrtko Ursulin 2021-04-12 9:05 ` [PATCH 12/19] drm/i915/lmem: Bypass aperture when lmem is available Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:33 ` Tvrtko Ursulin 2021-04-14 15:33 ` Tvrtko Ursulin 2021-04-16 14:25 ` Matthew Auld 2021-04-16 14:25 ` Matthew Auld 2021-04-19 14:16 ` Tvrtko Ursulin 2021-04-19 14:16 ` Tvrtko Ursulin 2021-04-12 9:05 ` [PATCH 13/19] drm/i915/dg1: Read OPROM via SPI controller Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-09-17 23:29 ` Lucas De Marchi 2021-04-12 9:05 ` [PATCH 14/19] drm/i915/oprom: Basic sanitization Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 22:36 ` kernel test robot 2021-04-12 22:36 ` kernel test robot 2021-04-12 22:36 ` kernel test robot 2021-04-12 22:36 ` [PATCH] drm/i915/oprom: fix memdup.cocci warnings kernel test robot 2021-04-12 22:36 ` kernel test robot 2021-04-12 22:36 ` [Intel-gfx] " kernel test robot 2021-05-17 11:57 ` [Intel-gfx] [PATCH 14/19] drm/i915/oprom: Basic sanitization Jani Nikula 2021-05-17 11:57 ` Jani Nikula 2021-09-18 4:30 ` Lucas De Marchi 2021-09-20 7:41 ` Jani Nikula 2021-09-20 8:04 ` Gupta, Anshuman 2021-09-20 8:04 ` Gupta, Anshuman 2021-09-20 8:43 ` Jani Nikula 2021-09-20 8:43 ` Jani Nikula 2021-09-22 21:53 ` Lucas De Marchi 2021-04-12 9:05 ` [PATCH 15/19] drm/i915: WA for zero memory channel Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 16:57 ` Souza, Jose 2021-04-12 16:57 ` [Intel-gfx] " Souza, Jose 2021-04-12 9:05 ` [PATCH 16/19] drm/i915/dg1: Compute MEM Bandwidth using MCHBAR Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 9:05 ` [PATCH 17/19] drm/i915/dg1: Double memory bandwidth available Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 9:05 ` [PATCH 18/19] drm/i915/gtt: map the PD up front Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 15:17 ` Daniel Vetter 2021-04-12 15:17 ` Daniel Vetter 2021-04-12 16:01 ` Jani Nikula 2021-04-12 16:01 ` Jani Nikula 2021-04-12 16:36 ` Daniel Vetter 2021-04-12 16:36 ` Daniel Vetter 2021-04-12 16:08 ` Matthew Auld 2021-04-12 16:08 ` Matthew Auld 2021-04-12 17:00 ` Daniel Vetter 2021-04-12 17:00 ` Daniel Vetter 2021-04-13 9:28 ` Matthew Auld 2021-04-13 9:28 ` Matthew Auld 2021-04-13 10:18 ` Daniel Vetter 2021-04-13 10:18 ` Daniel Vetter 2021-04-12 9:05 ` [PATCH 19/19] drm/i915/gtt/dgfx: place the PD in LMEM Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:37 ` Tvrtko Ursulin 2021-04-14 15:37 ` Tvrtko Ursulin 2021-04-12 11:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More DG1 enabling Patchwork 2021-04-12 11:12 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork 2021-04-12 11:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-04-12 13:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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