From: Matthew Auld <matthew.auld@intel.com> To: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, Chris Wilson <chris@chris-wilson.co.uk> Subject: [PATCH 02/19] drm/i915/selftests: Only query RAPL for integrated power measurements Date: Mon, 12 Apr 2021 10:05:09 +0100 [thread overview] Message-ID: <20210412090526.30547-3-matthew.auld@intel.com> (raw) In-Reply-To: <20210412090526.30547-1-matthew.auld@intel.com> From: Chris Wilson <chris@chris-wilson.co.uk> RAPL provides an on-package power measurements which does not encompass discrete graphics, so let's avoid using the igfx masurements when testing dgfx. Later we will abstract the simple librapl interface over hwmon so that we can verify basic power consumption scenarios. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> --- drivers/gpu/drm/i915/gt/selftest_rc6.c | 32 +++++++++++++++--------- drivers/gpu/drm/i915/gt/selftest_rps.c | 2 +- drivers/gpu/drm/i915/selftests/librapl.c | 10 ++++++++ drivers/gpu/drm/i915/selftests/librapl.h | 4 +++ 4 files changed, 35 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c b/drivers/gpu/drm/i915/gt/selftest_rc6.c index f097e420ac45..710f825f6e5a 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rc6.c +++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c @@ -34,6 +34,7 @@ int live_rc6_manual(void *arg) struct intel_rc6 *rc6 = >->rc6; u64 rc0_power, rc6_power; intel_wakeref_t wakeref; + bool has_power; ktime_t dt; u64 res[2]; int err = 0; @@ -50,6 +51,7 @@ int live_rc6_manual(void *arg) if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) return 0; + has_power = librapl_supported(gt->i915); wakeref = intel_runtime_pm_get(gt->uncore->rpm); /* Force RC6 off for starters */ @@ -71,11 +73,14 @@ int live_rc6_manual(void *arg) goto out_unlock; } - rc0_power = div64_u64(NSEC_PER_SEC * rc0_power, ktime_to_ns(dt)); - if (!rc0_power) { - pr_err("No power measured while in RC0\n"); - err = -EINVAL; - goto out_unlock; + if (has_power) { + rc0_power = div64_u64(NSEC_PER_SEC * rc0_power, + ktime_to_ns(dt)); + if (!rc0_power) { + pr_err("No power measured while in RC0\n"); + err = -EINVAL; + goto out_unlock; + } } /* Manually enter RC6 */ @@ -97,13 +102,16 @@ int live_rc6_manual(void *arg) err = -EINVAL; } - rc6_power = div64_u64(NSEC_PER_SEC * rc6_power, ktime_to_ns(dt)); - pr_info("GPU consumed %llduW in RC0 and %llduW in RC6\n", - rc0_power, rc6_power); - if (2 * rc6_power > rc0_power) { - pr_err("GPU leaked energy while in RC6!\n"); - err = -EINVAL; - goto out_unlock; + if (has_power) { + rc6_power = div64_u64(NSEC_PER_SEC * rc6_power, + ktime_to_ns(dt)); + pr_info("GPU consumed %llduW in RC0 and %llduW in RC6\n", + rc0_power, rc6_power); + if (2 * rc6_power > rc0_power) { + pr_err("GPU leaked energy while in RC6!\n"); + err = -EINVAL; + goto out_unlock; + } } /* Restore what should have been the original state! */ diff --git a/drivers/gpu/drm/i915/gt/selftest_rps.c b/drivers/gpu/drm/i915/gt/selftest_rps.c index 967641fee42a..adf7fdbc00f7 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rps.c +++ b/drivers/gpu/drm/i915/gt/selftest_rps.c @@ -1139,7 +1139,7 @@ int live_rps_power(void *arg) if (!intel_rps_is_enabled(rps) || INTEL_GEN(gt->i915) < 6) return 0; - if (!librapl_energy_uJ()) + if (!librapl_supported(gt->i915)) return 0; if (igt_spinner_init(&spin, gt)) diff --git a/drivers/gpu/drm/i915/selftests/librapl.c b/drivers/gpu/drm/i915/selftests/librapl.c index 58710ac3f979..eb03b5b28bad 100644 --- a/drivers/gpu/drm/i915/selftests/librapl.c +++ b/drivers/gpu/drm/i915/selftests/librapl.c @@ -5,8 +5,18 @@ #include <asm/msr.h> +#include "i915_drv.h" #include "librapl.h" +bool librapl_supported(const struct drm_i915_private *i915) +{ + /* Discrete cards require hwmon integration */ + if (IS_DGFX(i915)) + return false; + + return librapl_energy_uJ(); +} + u64 librapl_energy_uJ(void) { unsigned long long power; diff --git a/drivers/gpu/drm/i915/selftests/librapl.h b/drivers/gpu/drm/i915/selftests/librapl.h index 887f3e91dd05..e3b24fad0a7a 100644 --- a/drivers/gpu/drm/i915/selftests/librapl.h +++ b/drivers/gpu/drm/i915/selftests/librapl.h @@ -8,6 +8,10 @@ #include <linux/types.h> +struct drm_i915_private; + +bool librapl_supported(const struct drm_i915_private *i915); + u64 librapl_energy_uJ(void); #endif /* SELFTEST_LIBRAPL_H */ -- 2.26.3 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Matthew Auld <matthew.auld@intel.com> To: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, Chris Wilson <chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH 02/19] drm/i915/selftests: Only query RAPL for integrated power measurements Date: Mon, 12 Apr 2021 10:05:09 +0100 [thread overview] Message-ID: <20210412090526.30547-3-matthew.auld@intel.com> (raw) In-Reply-To: <20210412090526.30547-1-matthew.auld@intel.com> From: Chris Wilson <chris@chris-wilson.co.uk> RAPL provides an on-package power measurements which does not encompass discrete graphics, so let's avoid using the igfx masurements when testing dgfx. Later we will abstract the simple librapl interface over hwmon so that we can verify basic power consumption scenarios. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> --- drivers/gpu/drm/i915/gt/selftest_rc6.c | 32 +++++++++++++++--------- drivers/gpu/drm/i915/gt/selftest_rps.c | 2 +- drivers/gpu/drm/i915/selftests/librapl.c | 10 ++++++++ drivers/gpu/drm/i915/selftests/librapl.h | 4 +++ 4 files changed, 35 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c b/drivers/gpu/drm/i915/gt/selftest_rc6.c index f097e420ac45..710f825f6e5a 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rc6.c +++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c @@ -34,6 +34,7 @@ int live_rc6_manual(void *arg) struct intel_rc6 *rc6 = >->rc6; u64 rc0_power, rc6_power; intel_wakeref_t wakeref; + bool has_power; ktime_t dt; u64 res[2]; int err = 0; @@ -50,6 +51,7 @@ int live_rc6_manual(void *arg) if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) return 0; + has_power = librapl_supported(gt->i915); wakeref = intel_runtime_pm_get(gt->uncore->rpm); /* Force RC6 off for starters */ @@ -71,11 +73,14 @@ int live_rc6_manual(void *arg) goto out_unlock; } - rc0_power = div64_u64(NSEC_PER_SEC * rc0_power, ktime_to_ns(dt)); - if (!rc0_power) { - pr_err("No power measured while in RC0\n"); - err = -EINVAL; - goto out_unlock; + if (has_power) { + rc0_power = div64_u64(NSEC_PER_SEC * rc0_power, + ktime_to_ns(dt)); + if (!rc0_power) { + pr_err("No power measured while in RC0\n"); + err = -EINVAL; + goto out_unlock; + } } /* Manually enter RC6 */ @@ -97,13 +102,16 @@ int live_rc6_manual(void *arg) err = -EINVAL; } - rc6_power = div64_u64(NSEC_PER_SEC * rc6_power, ktime_to_ns(dt)); - pr_info("GPU consumed %llduW in RC0 and %llduW in RC6\n", - rc0_power, rc6_power); - if (2 * rc6_power > rc0_power) { - pr_err("GPU leaked energy while in RC6!\n"); - err = -EINVAL; - goto out_unlock; + if (has_power) { + rc6_power = div64_u64(NSEC_PER_SEC * rc6_power, + ktime_to_ns(dt)); + pr_info("GPU consumed %llduW in RC0 and %llduW in RC6\n", + rc0_power, rc6_power); + if (2 * rc6_power > rc0_power) { + pr_err("GPU leaked energy while in RC6!\n"); + err = -EINVAL; + goto out_unlock; + } } /* Restore what should have been the original state! */ diff --git a/drivers/gpu/drm/i915/gt/selftest_rps.c b/drivers/gpu/drm/i915/gt/selftest_rps.c index 967641fee42a..adf7fdbc00f7 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rps.c +++ b/drivers/gpu/drm/i915/gt/selftest_rps.c @@ -1139,7 +1139,7 @@ int live_rps_power(void *arg) if (!intel_rps_is_enabled(rps) || INTEL_GEN(gt->i915) < 6) return 0; - if (!librapl_energy_uJ()) + if (!librapl_supported(gt->i915)) return 0; if (igt_spinner_init(&spin, gt)) diff --git a/drivers/gpu/drm/i915/selftests/librapl.c b/drivers/gpu/drm/i915/selftests/librapl.c index 58710ac3f979..eb03b5b28bad 100644 --- a/drivers/gpu/drm/i915/selftests/librapl.c +++ b/drivers/gpu/drm/i915/selftests/librapl.c @@ -5,8 +5,18 @@ #include <asm/msr.h> +#include "i915_drv.h" #include "librapl.h" +bool librapl_supported(const struct drm_i915_private *i915) +{ + /* Discrete cards require hwmon integration */ + if (IS_DGFX(i915)) + return false; + + return librapl_energy_uJ(); +} + u64 librapl_energy_uJ(void) { unsigned long long power; diff --git a/drivers/gpu/drm/i915/selftests/librapl.h b/drivers/gpu/drm/i915/selftests/librapl.h index 887f3e91dd05..e3b24fad0a7a 100644 --- a/drivers/gpu/drm/i915/selftests/librapl.h +++ b/drivers/gpu/drm/i915/selftests/librapl.h @@ -8,6 +8,10 @@ #include <linux/types.h> +struct drm_i915_private; + +bool librapl_supported(const struct drm_i915_private *i915); + u64 librapl_energy_uJ(void); #endif /* SELFTEST_LIBRAPL_H */ -- 2.26.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-04-12 9:09 UTC|newest] Thread overview: 132+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-12 9:05 [PATCH 00/19] More DG1 enabling Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 9:05 ` [PATCH 01/19] drm/i915/gt: Skip aperture remapping selftest where there is no aperture Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 14:48 ` Daniel Vetter 2021-04-12 14:48 ` Daniel Vetter 2021-04-12 9:05 ` Matthew Auld [this message] 2021-04-12 9:05 ` [Intel-gfx] [PATCH 02/19] drm/i915/selftests: Only query RAPL for integrated power measurements Matthew Auld 2021-04-12 9:05 ` [PATCH 03/19] drm/i915: Create stolen memory region from local memory Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:01 ` Tvrtko Ursulin 2021-04-14 15:01 ` Tvrtko Ursulin 2021-04-16 15:04 ` Matthew Auld 2021-04-16 15:04 ` Matthew Auld 2021-04-19 14:15 ` Tvrtko Ursulin 2021-04-19 14:15 ` Tvrtko Ursulin 2021-04-12 9:05 ` [PATCH 04/19] drm/i915/stolen: treat stolen local as normal " Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:06 ` Tvrtko Ursulin 2021-04-14 15:06 ` Tvrtko Ursulin 2021-04-12 9:05 ` [PATCH 05/19] drm/i915/stolen: enforce the min_page_size contract Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:07 ` Tvrtko Ursulin 2021-04-14 15:07 ` Tvrtko Ursulin 2021-04-12 9:05 ` [PATCH 06/19] drm/i915/stolen: pass the allocation flags Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:09 ` Tvrtko Ursulin 2021-04-14 15:09 ` Tvrtko Ursulin 2021-04-16 13:53 ` Matthew Auld 2021-04-16 13:53 ` Matthew Auld 2021-04-12 9:05 ` [PATCH 07/19] drm/i915/fbdev: Use lmem physical addresses for fb_mmap() on discrete Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 15:00 ` Daniel Vetter 2021-04-12 15:00 ` [Intel-gfx] " Daniel Vetter 2021-04-12 9:05 ` [PATCH 08/19] drm/i915: Return error value when bo not in LMEM for discrete Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:16 ` Tvrtko Ursulin 2021-04-14 15:16 ` Tvrtko Ursulin 2021-04-12 9:05 ` [PATCH 09/19] drm/i915/lmem: Fail driver init if LMEM training failed Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 9:05 ` [PATCH 10/19] drm/i915/dg1: Fix mapping type for default state object Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 9:05 ` [PATCH 11/19] drm/i915: Update the helper to set correct mapping Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:22 ` Tvrtko Ursulin 2021-04-14 15:22 ` Tvrtko Ursulin 2021-04-14 16:20 ` Matthew Auld 2021-04-14 16:20 ` Matthew Auld 2021-04-15 8:20 ` Tvrtko Ursulin 2021-04-15 8:20 ` Tvrtko Ursulin 2021-04-15 9:23 ` Matthew Auld 2021-04-15 9:23 ` Matthew Auld 2021-04-15 11:05 ` Tvrtko Ursulin 2021-04-15 11:05 ` Tvrtko Ursulin 2021-04-19 11:30 ` Matthew Auld 2021-04-19 11:30 ` Matthew Auld 2021-04-19 14:07 ` Tvrtko Ursulin 2021-04-19 14:07 ` Tvrtko Ursulin 2021-04-19 14:37 ` Matthew Auld 2021-04-19 14:37 ` Matthew Auld 2021-04-19 15:01 ` Tvrtko Ursulin 2021-04-19 15:01 ` Tvrtko Ursulin 2021-04-21 11:42 ` Matthew Auld 2021-04-21 11:42 ` Matthew Auld 2021-04-21 15:41 ` Tvrtko Ursulin 2021-04-21 15:41 ` Tvrtko Ursulin 2021-04-21 19:13 ` Matthew Auld 2021-04-21 19:13 ` Matthew Auld 2021-04-26 8:57 ` Matthew Auld 2021-04-26 8:57 ` Matthew Auld 2021-04-26 9:21 ` Tvrtko Ursulin 2021-04-26 9:21 ` Tvrtko Ursulin 2021-04-12 9:05 ` [PATCH 12/19] drm/i915/lmem: Bypass aperture when lmem is available Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:33 ` Tvrtko Ursulin 2021-04-14 15:33 ` Tvrtko Ursulin 2021-04-16 14:25 ` Matthew Auld 2021-04-16 14:25 ` Matthew Auld 2021-04-19 14:16 ` Tvrtko Ursulin 2021-04-19 14:16 ` Tvrtko Ursulin 2021-04-12 9:05 ` [PATCH 13/19] drm/i915/dg1: Read OPROM via SPI controller Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-09-17 23:29 ` Lucas De Marchi 2021-04-12 9:05 ` [PATCH 14/19] drm/i915/oprom: Basic sanitization Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 22:36 ` kernel test robot 2021-04-12 22:36 ` kernel test robot 2021-04-12 22:36 ` kernel test robot 2021-04-12 22:36 ` [PATCH] drm/i915/oprom: fix memdup.cocci warnings kernel test robot 2021-04-12 22:36 ` kernel test robot 2021-04-12 22:36 ` [Intel-gfx] " kernel test robot 2021-05-17 11:57 ` [Intel-gfx] [PATCH 14/19] drm/i915/oprom: Basic sanitization Jani Nikula 2021-05-17 11:57 ` Jani Nikula 2021-09-18 4:30 ` Lucas De Marchi 2021-09-20 7:41 ` Jani Nikula 2021-09-20 8:04 ` Gupta, Anshuman 2021-09-20 8:04 ` Gupta, Anshuman 2021-09-20 8:43 ` Jani Nikula 2021-09-20 8:43 ` Jani Nikula 2021-09-22 21:53 ` Lucas De Marchi 2021-04-12 9:05 ` [PATCH 15/19] drm/i915: WA for zero memory channel Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 16:57 ` Souza, Jose 2021-04-12 16:57 ` [Intel-gfx] " Souza, Jose 2021-04-12 9:05 ` [PATCH 16/19] drm/i915/dg1: Compute MEM Bandwidth using MCHBAR Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 9:05 ` [PATCH 17/19] drm/i915/dg1: Double memory bandwidth available Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 9:05 ` [PATCH 18/19] drm/i915/gtt: map the PD up front Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-12 15:17 ` Daniel Vetter 2021-04-12 15:17 ` Daniel Vetter 2021-04-12 16:01 ` Jani Nikula 2021-04-12 16:01 ` Jani Nikula 2021-04-12 16:36 ` Daniel Vetter 2021-04-12 16:36 ` Daniel Vetter 2021-04-12 16:08 ` Matthew Auld 2021-04-12 16:08 ` Matthew Auld 2021-04-12 17:00 ` Daniel Vetter 2021-04-12 17:00 ` Daniel Vetter 2021-04-13 9:28 ` Matthew Auld 2021-04-13 9:28 ` Matthew Auld 2021-04-13 10:18 ` Daniel Vetter 2021-04-13 10:18 ` Daniel Vetter 2021-04-12 9:05 ` [PATCH 19/19] drm/i915/gtt/dgfx: place the PD in LMEM Matthew Auld 2021-04-12 9:05 ` [Intel-gfx] " Matthew Auld 2021-04-14 15:37 ` Tvrtko Ursulin 2021-04-14 15:37 ` Tvrtko Ursulin 2021-04-12 11:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More DG1 enabling Patchwork 2021-04-12 11:12 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork 2021-04-12 11:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-04-12 13:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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