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From: Luis Pires <luis.pires@eldorado.org.br>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: richard.henderson@linaro.org, f4bug@amsat.org,
	Luis Pires <luis.pires@eldorado.org.br>,
	lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br,
	matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au
Subject: [PATCH 1/5] decodetree: Add support for 64-bit instructions
Date: Tue, 13 Apr 2021 18:11:25 -0300	[thread overview]
Message-ID: <20210413211129.457272-2-luis.pires@eldorado.org.br> (raw)
In-Reply-To: <20210413211129.457272-1-luis.pires@eldorado.org.br>

Allow '64' to be specified for the instruction width command line params
and use the appropriate insn/field data types, mask, extract and deposit
functions in that case.

This will be used to implement the new 64-bit Power ISA 3.1 instructions.

Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
---
 docs/devel/decodetree.rst |  5 +++--
 scripts/decodetree.py     | 26 +++++++++++++++++++++-----
 2 files changed, 24 insertions(+), 7 deletions(-)

diff --git a/docs/devel/decodetree.rst b/docs/devel/decodetree.rst
index 74f66bf46e..d776dae14f 100644
--- a/docs/devel/decodetree.rst
+++ b/docs/devel/decodetree.rst
@@ -40,8 +40,9 @@ and returns an integral value extracted from there.
 
 A field with no ``unnamed_fields`` and no ``!function`` is in error.
 
-FIXME: the fields of the structure into which this result will be stored
-is restricted to ``int``.  Which means that we cannot expand 64-bit items.
+The fields of the structure into which this result will be stored are
+defined as ``int`` when the instruction size is set to 16 or 32 bits
+and as ``int64_t`` when the instruction size is set to 64 bits.
 
 Field examples:
 
diff --git a/scripts/decodetree.py b/scripts/decodetree.py
index 4637b633e7..4e18f52a65 100644
--- a/scripts/decodetree.py
+++ b/scripts/decodetree.py
@@ -42,6 +42,10 @@
 output_fd = None
 insntype = 'uint32_t'
 decode_function = 'decode'
+field_data_type = 'int'
+extract_function = 'extract32'
+sextract_function = 'sextract32'
+deposit_function = 'deposit32'
 
 # An identifier for C.
 re_C_ident = '[a-zA-Z][a-zA-Z0-9_]*'
@@ -185,9 +189,9 @@ def __str__(self):
 
     def str_extract(self):
         if self.sign:
-            extr = 'sextract32'
+            extr = sextract_function
         else:
-            extr = 'extract32'
+            extr = extract_function
         return '{0}(insn, {1}, {2})'.format(extr, self.pos, self.len)
 
     def __eq__(self, other):
@@ -215,8 +219,9 @@ def str_extract(self):
             if pos == 0:
                 ret = f.str_extract()
             else:
-                ret = 'deposit32({0}, {1}, {2}, {3})' \
-                      .format(ret, pos, 32 - pos, f.str_extract())
+                ret = '{4}({0}, {1}, {2}, {3})' \
+                      .format(ret, pos, insnwidth - pos, f.str_extract(),
+                              deposit_function)
             pos += f.len
         return ret
 
@@ -311,7 +316,7 @@ def output_def(self):
         if not self.extern:
             output('typedef struct {\n')
             for n in self.fields:
-                output('    int ', n, ';\n')
+                output('    ', field_data_type, ' ', n, ';\n')
             output('} ', self.struct_name(), ';\n\n')
 # end Arguments
 
@@ -1264,6 +1269,10 @@ def main():
     global insntype
     global insnmask
     global decode_function
+    global extract_function
+    global sextract_function
+    global deposit_function
+    global field_data_type
     global variablewidth
     global anyextern
 
@@ -1293,6 +1302,13 @@ def main():
             if insnwidth == 16:
                 insntype = 'uint16_t'
                 insnmask = 0xffff
+            elif insnwidth == 64:
+                insntype = 'uint64_t'
+                insnmask = 0xffffffffffffffff
+                field_data_type = 'int64_t'
+                extract_function = 'extract64'
+                sextract_function = 'sextract64'
+                deposit_function = 'deposit64'
             elif insnwidth != 32:
                 error(0, 'cannot handle insns of width', insnwidth)
         else:
-- 
2.25.1



  reply	other threads:[~2021-04-13 21:17 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-13 21:11 [PATCH 0/5] Base for adding PowerPC 64-bit instructions Luis Pires
2021-04-13 21:11 ` Luis Pires [this message]
2021-04-13 21:11 ` [PATCH 2/5] decodetree: Fix empty input files for varinsnwidth Luis Pires
2021-04-14 19:47   ` Richard Henderson
2021-04-13 21:11 ` [PATCH 3/5] decodetree: Allow custom var width load functions Luis Pires
2021-04-13 21:11 ` [PATCH 4/5] target/ppc: Base changes to allow 32/64-bit insns Luis Pires
2021-04-14 15:26   ` Richard Henderson
2021-04-14 16:09   ` Richard Henderson
2021-04-14 16:10   ` Richard Henderson
2021-04-13 21:11 ` [PATCH 5/5] target/ppc: Implement paddi and replace addi insns Luis Pires
2021-04-13 22:41   ` Philippe Mathieu-Daudé
2021-04-14 13:00     ` Luis Fernando Fujita Pires
2021-04-14 19:11   ` Richard Henderson
2021-04-14 23:07     ` Richard Henderson
2021-04-15 16:59     ` Richard Henderson

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