From: Zev Weiss <zev@bewilderbeest.net>
To: Joel Stanley <joel@jms.id.au>
Cc: openbmc@lists.ozlabs.org, Zev Weiss <zev@bewilderbeest.net>,
Rob Herring <robh+dt@kernel.org>,
Andrew Jeffery <andrew@aj.id.au>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: [PATCH] ARM: dts: aspeed: update e3c246d4i vuart properties
Date: Fri, 16 Apr 2021 02:51:13 -0500 [thread overview]
Message-ID: <20210416075113.18047-1-zev@bewilderbeest.net> (raw)
This device-tree was merged with a provisional vuart IRQ-polarity
property that was still under review and ended up taking a somewhat
different form. This patch updates it to match the final form of the
new vuart properties, which additionally allow specifying the SIRQ
number and LPC address.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
---
The relevant aspeed-vuart patches [0] have been merged into Greg KH's
tty-next tree, so I figure it's probably okay to proceed with the
corresponding dts adjustments now.
[0] https://lore.kernel.org/openbmc/20210412034712.16778-1-zev@bewilderbeest.net/
arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts b/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts
index dcab6e78dfa4..8be40c8283af 100644
--- a/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts
@@ -4,6 +4,7 @@
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/i2c/i2c.h>
+#include <dt-bindings/interrupt-controller/irq.h>
/{
model = "ASRock E3C246D4I BMC";
@@ -73,7 +74,8 @@ &uart5 {
&vuart {
status = "okay";
- aspeed,sirq-active-high;
+ aspeed,lpc-io-reg = <0x2f8>;
+ aspeed,lpc-interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
};
&mac0 {
--
2.31.1
WARNING: multiple messages have this Message-ID (diff)
From: Zev Weiss <zev@bewilderbeest.net>
To: Joel Stanley <joel@jms.id.au>
Cc: devicetree@vger.kernel.org, linux-aspeed@lists.ozlabs.org,
Zev Weiss <zev@bewilderbeest.net>,
Andrew Jeffery <andrew@aj.id.au>,
openbmc@lists.ozlabs.org, linux-kernel@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: dts: aspeed: update e3c246d4i vuart properties
Date: Fri, 16 Apr 2021 02:51:13 -0500 [thread overview]
Message-ID: <20210416075113.18047-1-zev@bewilderbeest.net> (raw)
This device-tree was merged with a provisional vuart IRQ-polarity
property that was still under review and ended up taking a somewhat
different form. This patch updates it to match the final form of the
new vuart properties, which additionally allow specifying the SIRQ
number and LPC address.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
---
The relevant aspeed-vuart patches [0] have been merged into Greg KH's
tty-next tree, so I figure it's probably okay to proceed with the
corresponding dts adjustments now.
[0] https://lore.kernel.org/openbmc/20210412034712.16778-1-zev@bewilderbeest.net/
arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts b/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts
index dcab6e78dfa4..8be40c8283af 100644
--- a/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts
@@ -4,6 +4,7 @@
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/i2c/i2c.h>
+#include <dt-bindings/interrupt-controller/irq.h>
/{
model = "ASRock E3C246D4I BMC";
@@ -73,7 +74,8 @@ &uart5 {
&vuart {
status = "okay";
- aspeed,sirq-active-high;
+ aspeed,lpc-io-reg = <0x2f8>;
+ aspeed,lpc-interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
};
&mac0 {
--
2.31.1
WARNING: multiple messages have this Message-ID (diff)
From: Zev Weiss <zev@bewilderbeest.net>
To: Joel Stanley <joel@jms.id.au>
Cc: openbmc@lists.ozlabs.org, Zev Weiss <zev@bewilderbeest.net>,
Rob Herring <robh+dt@kernel.org>,
Andrew Jeffery <andrew@aj.id.au>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: [PATCH] ARM: dts: aspeed: update e3c246d4i vuart properties
Date: Fri, 16 Apr 2021 02:51:13 -0500 [thread overview]
Message-ID: <20210416075113.18047-1-zev@bewilderbeest.net> (raw)
This device-tree was merged with a provisional vuart IRQ-polarity
property that was still under review and ended up taking a somewhat
different form. This patch updates it to match the final form of the
new vuart properties, which additionally allow specifying the SIRQ
number and LPC address.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
---
The relevant aspeed-vuart patches [0] have been merged into Greg KH's
tty-next tree, so I figure it's probably okay to proceed with the
corresponding dts adjustments now.
[0] https://lore.kernel.org/openbmc/20210412034712.16778-1-zev@bewilderbeest.net/
arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts b/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts
index dcab6e78dfa4..8be40c8283af 100644
--- a/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts
@@ -4,6 +4,7 @@
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/i2c/i2c.h>
+#include <dt-bindings/interrupt-controller/irq.h>
/{
model = "ASRock E3C246D4I BMC";
@@ -73,7 +74,8 @@ &uart5 {
&vuart {
status = "okay";
- aspeed,sirq-active-high;
+ aspeed,lpc-io-reg = <0x2f8>;
+ aspeed,lpc-interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
};
&mac0 {
--
2.31.1
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next reply other threads:[~2021-04-16 7:52 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-16 7:51 Zev Weiss [this message]
2021-04-16 7:51 ` [PATCH] ARM: dts: aspeed: update e3c246d4i vuart properties Zev Weiss
2021-04-16 7:51 ` Zev Weiss
2021-04-27 3:59 ` Andrew Jeffery
2021-04-27 3:59 ` Andrew Jeffery
2021-04-27 3:59 ` Andrew Jeffery
2021-07-01 3:12 ` Joel Stanley
2021-07-01 3:12 ` Joel Stanley
2021-07-01 3:12 ` Joel Stanley
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