From: Rob Herring <robh@kernel.org> To: Will Deacon <will@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>, Arnaldo Carvalho de Melo <acme@kernel.org>, Jiri Olsa <jolsa@redhat.com>, Mark Rutland <mark.rutland@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>, honnappa.nagarahalli@arm.com, Zachary.Leaf@arm.com, Raphael Gault <raphael.gault@arm.com>, Jonathan Cameron <Jonathan.Cameron@huawei.com>, Namhyung Kim <namhyung@kernel.org>, Itaru Kitayama <itaru.kitayama@gmail.com>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 2/9] arm64: pmu: Add function implementation to update event index in userpage Date: Mon, 19 Apr 2021 22:15:04 -0500 [thread overview] Message-ID: <20210420031511.2348977-3-robh@kernel.org> (raw) In-Reply-To: <20210420031511.2348977-1-robh@kernel.org> From: Raphael Gault <raphael.gault@arm.com> In order to be able to access the counter directly for userspace, we need to provide the index of the counter using the userpage. We thus need to override the event_idx function to retrieve and convert the perf_event index to armv8 hardware index. Since the arm_pmu driver can be used by any implementation, even if not armv8, two components play a role into making sure the behaviour is correct and consistent with the PMU capabilities: * the ARMPMU_EL0_RD_CNTR flag which denotes the capability to access counter from userspace. * the event_idx call back, which is implemented and initialized by the PMU implementation: if no callback is provided, the default behaviour applies, returning 0 as index value. Signed-off-by: Raphael Gault <raphael.gault@arm.com> Signed-off-by: Rob Herring <robh@kernel.org> --- v7: - Add define ARMV8_IDX_CYCLE_COUNTER_USER for userspace index of cycle counter --- arch/arm64/kernel/perf_event.c | 20 +++++++++++++++++++- include/linux/perf/arm_pmu.h | 2 ++ 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 4658fcf88c2b..40cf59455ce8 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -332,7 +332,7 @@ static const struct attribute_group armv8_pmuv3_caps_attr_group = { */ #define ARMV8_IDX_CYCLE_COUNTER 0 #define ARMV8_IDX_COUNTER0 1 - +#define ARMV8_IDX_CYCLE_COUNTER_USER 32 /* * We unconditionally enable ARMv8.5-PMU long event counter support @@ -871,6 +871,22 @@ static void armv8pmu_clear_event_idx(struct pmu_hw_events *cpuc, clear_bit(idx - 1, cpuc->used_mask); } +static int armv8pmu_access_event_idx(struct perf_event *event) +{ + if (!(event->hw.flags & ARMPMU_EL0_RD_CNTR)) + return 0; + + /* + * We remap the cycle counter index to 32 to + * match the offset applied to the rest of + * the counter indices. + */ + if (event->hw.idx == ARMV8_IDX_CYCLE_COUNTER) + return ARMV8_IDX_CYCLE_COUNTER_USER; + + return event->hw.idx; +} + /* * Add an event filter to a given event. */ @@ -1098,6 +1114,8 @@ static int armv8_pmu_init(struct arm_pmu *cpu_pmu, char *name, cpu_pmu->set_event_filter = armv8pmu_set_event_filter; cpu_pmu->filter_match = armv8pmu_filter_match; + cpu_pmu->pmu.event_idx = armv8pmu_access_event_idx; + cpu_pmu->name = name; cpu_pmu->map_event = map_event; cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] = events ? diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h index 505480217cf1..d29aa981d989 100644 --- a/include/linux/perf/arm_pmu.h +++ b/include/linux/perf/arm_pmu.h @@ -26,6 +26,8 @@ */ /* Event uses a 64bit counter */ #define ARMPMU_EVT_64BIT 1 +/* Allow access to hardware counter from userspace */ +#define ARMPMU_EL0_RD_CNTR 2 #define HW_OP_UNSUPPORTED 0xFFFF #define C(_x) PERF_COUNT_HW_CACHE_##_x -- 2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org> To: Will Deacon <will@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>, Arnaldo Carvalho de Melo <acme@kernel.org>, Jiri Olsa <jolsa@redhat.com>, Mark Rutland <mark.rutland@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>, honnappa.nagarahalli@arm.com, Zachary.Leaf@arm.com, Raphael Gault <raphael.gault@arm.com>, Jonathan Cameron <Jonathan.Cameron@huawei.com>, Namhyung Kim <namhyung@kernel.org>, Itaru Kitayama <itaru.kitayama@gmail.com>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 2/9] arm64: pmu: Add function implementation to update event index in userpage Date: Mon, 19 Apr 2021 22:15:04 -0500 [thread overview] Message-ID: <20210420031511.2348977-3-robh@kernel.org> (raw) In-Reply-To: <20210420031511.2348977-1-robh@kernel.org> From: Raphael Gault <raphael.gault@arm.com> In order to be able to access the counter directly for userspace, we need to provide the index of the counter using the userpage. We thus need to override the event_idx function to retrieve and convert the perf_event index to armv8 hardware index. Since the arm_pmu driver can be used by any implementation, even if not armv8, two components play a role into making sure the behaviour is correct and consistent with the PMU capabilities: * the ARMPMU_EL0_RD_CNTR flag which denotes the capability to access counter from userspace. * the event_idx call back, which is implemented and initialized by the PMU implementation: if no callback is provided, the default behaviour applies, returning 0 as index value. Signed-off-by: Raphael Gault <raphael.gault@arm.com> Signed-off-by: Rob Herring <robh@kernel.org> --- v7: - Add define ARMV8_IDX_CYCLE_COUNTER_USER for userspace index of cycle counter --- arch/arm64/kernel/perf_event.c | 20 +++++++++++++++++++- include/linux/perf/arm_pmu.h | 2 ++ 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 4658fcf88c2b..40cf59455ce8 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -332,7 +332,7 @@ static const struct attribute_group armv8_pmuv3_caps_attr_group = { */ #define ARMV8_IDX_CYCLE_COUNTER 0 #define ARMV8_IDX_COUNTER0 1 - +#define ARMV8_IDX_CYCLE_COUNTER_USER 32 /* * We unconditionally enable ARMv8.5-PMU long event counter support @@ -871,6 +871,22 @@ static void armv8pmu_clear_event_idx(struct pmu_hw_events *cpuc, clear_bit(idx - 1, cpuc->used_mask); } +static int armv8pmu_access_event_idx(struct perf_event *event) +{ + if (!(event->hw.flags & ARMPMU_EL0_RD_CNTR)) + return 0; + + /* + * We remap the cycle counter index to 32 to + * match the offset applied to the rest of + * the counter indices. + */ + if (event->hw.idx == ARMV8_IDX_CYCLE_COUNTER) + return ARMV8_IDX_CYCLE_COUNTER_USER; + + return event->hw.idx; +} + /* * Add an event filter to a given event. */ @@ -1098,6 +1114,8 @@ static int armv8_pmu_init(struct arm_pmu *cpu_pmu, char *name, cpu_pmu->set_event_filter = armv8pmu_set_event_filter; cpu_pmu->filter_match = armv8pmu_filter_match; + cpu_pmu->pmu.event_idx = armv8pmu_access_event_idx; + cpu_pmu->name = name; cpu_pmu->map_event = map_event; cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] = events ? diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h index 505480217cf1..d29aa981d989 100644 --- a/include/linux/perf/arm_pmu.h +++ b/include/linux/perf/arm_pmu.h @@ -26,6 +26,8 @@ */ /* Event uses a 64bit counter */ #define ARMPMU_EVT_64BIT 1 +/* Allow access to hardware counter from userspace */ +#define ARMPMU_EL0_RD_CNTR 2 #define HW_OP_UNSUPPORTED 0xFFFF #define C(_x) PERF_COUNT_HW_CACHE_##_x -- 2.27.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-04-20 3:15 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-20 3:15 [PATCH v7 0/9] arm64 userspace counter access support Rob Herring 2021-04-20 3:15 ` Rob Herring 2021-04-20 3:15 ` [PATCH v7 1/9] arm64: Restrict undef hook for cpufeature registers Rob Herring 2021-04-20 3:15 ` Rob Herring 2021-04-20 3:15 ` Rob Herring [this message] 2021-04-20 3:15 ` [PATCH v7 2/9] arm64: pmu: Add function implementation to update event index in userpage Rob Herring 2021-04-20 3:15 ` [PATCH v7 3/9] arm64: perf: Enable PMU counter direct access for perf event Rob Herring 2021-04-20 3:15 ` Rob Herring 2021-04-20 3:15 ` [PATCH v7 4/9] drivers/perf: arm_pmu: Export the per_cpu cpu_armpmu Rob Herring 2021-04-20 3:15 ` Rob Herring 2021-04-20 3:15 ` [PATCH v7 5/9] arm64: perf: Add userspace counter access disable switch Rob Herring 2021-04-20 3:15 ` Rob Herring 2021-04-20 3:15 ` [PATCH v7 6/9] libperf: Add arm64 support to perf_mmap__read_self() Rob Herring 2021-04-20 3:15 ` Rob Herring 2021-04-20 3:15 ` [PATCH v7 7/9] perf: arm64: Add test for userspace counter access on heterogeneous systems Rob Herring 2021-04-20 3:15 ` Rob Herring 2021-04-30 16:46 ` Masayoshi Mizuma 2021-04-30 16:46 ` Masayoshi Mizuma 2021-04-30 18:17 ` Rob Herring 2021-04-30 18:17 ` Rob Herring 2021-04-30 18:20 ` Rob Herring 2021-04-30 18:20 ` Rob Herring 2021-04-30 20:16 ` Masayoshi Mizuma 2021-04-30 20:16 ` Masayoshi Mizuma 2021-05-13 9:05 ` nakamura.shun 2021-05-13 9:05 ` nakamura.shun 2021-05-13 12:37 ` Rob Herring 2021-05-13 12:37 ` Rob Herring 2021-04-20 3:15 ` [PATCH v7 8/9] perf: arm64: Add tests for 32-bit and 64-bit counter size userspace access Rob Herring 2021-04-20 3:15 ` Rob Herring 2021-04-20 3:15 ` [PATCH v7 9/9] Documentation: arm64: Document PMU counters access from userspace Rob Herring 2021-04-20 3:15 ` Rob Herring 2021-04-30 18:59 ` [PATCH v7 0/9] arm64 userspace counter access support Arnaldo Carvalho de Melo 2021-04-30 18:59 ` Arnaldo Carvalho de Melo 2021-05-03 14:56 ` Rob Herring 2021-05-03 14:56 ` Rob Herring
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