From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
To: jassisinghbrar@gmail.com, robh+dt@kernel.org,
shawnguo@kernel.org, s.hauer@pengutronix.de,
o.rempel@pengutronix.de
Cc: kernel@pengutronix.de, festevam@gmail.com, aisheng.dong@nxp.com,
linux-imx@nxp.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Peng Fan <peng.fan@nxp.com>
Subject: [PATCH 1/4] dt-bindings: mailbox: imx-mu: add i.MX8ULP MU support
Date: Fri, 7 May 2021 18:19:23 +0800 [thread overview]
Message-ID: <20210507101926.25631-2-peng.fan@oss.nxp.com> (raw)
In-Reply-To: <20210507101926.25631-1-peng.fan@oss.nxp.com>
From: Peng Fan <peng.fan@nxp.com>
The register layout and bits definition of i.MX8ULP MU is different
compared with others, let's add the compatible for the new MU.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
Documentation/devicetree/bindings/mailbox/fsl,mu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
index 1a3dff277e2b..675ad9de15bb 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
@@ -26,6 +26,7 @@ properties:
oneOf:
- const: fsl,imx6sx-mu
- const: fsl,imx7ulp-mu
+ - const: fsl,imx8ulp-mu
- const: fsl,imx8-mu-scu
- items:
- enum:
--
2.30.0
WARNING: multiple messages have this Message-ID (diff)
From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
To: jassisinghbrar@gmail.com, robh+dt@kernel.org,
shawnguo@kernel.org, s.hauer@pengutronix.de,
o.rempel@pengutronix.de
Cc: kernel@pengutronix.de, festevam@gmail.com, aisheng.dong@nxp.com,
linux-imx@nxp.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Peng Fan <peng.fan@nxp.com>
Subject: [PATCH 1/4] dt-bindings: mailbox: imx-mu: add i.MX8ULP MU support
Date: Fri, 7 May 2021 18:19:23 +0800 [thread overview]
Message-ID: <20210507101926.25631-2-peng.fan@oss.nxp.com> (raw)
In-Reply-To: <20210507101926.25631-1-peng.fan@oss.nxp.com>
From: Peng Fan <peng.fan@nxp.com>
The register layout and bits definition of i.MX8ULP MU is different
compared with others, let's add the compatible for the new MU.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
Documentation/devicetree/bindings/mailbox/fsl,mu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
index 1a3dff277e2b..675ad9de15bb 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
@@ -26,6 +26,7 @@ properties:
oneOf:
- const: fsl,imx6sx-mu
- const: fsl,imx7ulp-mu
+ - const: fsl,imx8ulp-mu
- const: fsl,imx8-mu-scu
- items:
- enum:
--
2.30.0
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next prev parent reply other threads:[~2021-05-07 9:47 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-07 10:19 [PATCH 0/4] mailbox: imx: add i.MX8ULP MU support Peng Fan (OSS)
2021-05-07 10:19 ` Peng Fan (OSS)
2021-05-07 10:19 ` Peng Fan (OSS) [this message]
2021-05-07 10:19 ` [PATCH 1/4] dt-bindings: mailbox: imx-mu: " Peng Fan (OSS)
2021-05-10 15:49 ` Rob Herring
2021-05-10 15:49 ` Rob Herring
2021-05-07 10:19 ` [PATCH 2/4] mailbox: imx: replace the xTR/xRR array with single register Peng Fan (OSS)
2021-05-07 10:19 ` Peng Fan (OSS)
2021-05-26 6:58 ` Daniel Baluta
2021-05-26 6:58 ` Daniel Baluta
2021-05-27 0:36 ` Peng Fan (OSS)
2021-05-27 0:36 ` Peng Fan (OSS)
2021-05-07 10:19 ` [PATCH 3/4] mailbox: imx: add xSR/xCR register array Peng Fan (OSS)
2021-05-07 10:19 ` Peng Fan (OSS)
2021-05-07 16:08 ` kernel test robot
2021-05-07 16:08 ` kernel test robot
2021-05-10 1:21 ` Peng Fan (OSS)
2021-05-10 1:21 ` Peng Fan
2021-05-07 10:19 ` [PATCH 4/4] mailbox: imx-mailbox: support i.MX8ULP MU Peng Fan (OSS)
2021-05-07 10:19 ` Peng Fan (OSS)
2021-05-26 6:06 ` [PATCH 0/4] mailbox: imx: add i.MX8ULP MU support Peng Fan (OSS)
2021-05-26 6:06 ` Peng Fan (OSS)
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