From: Roman Beranek <roman.beranek@prusa3d.cz> To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de> Cc: Thierry Reding <thierry.reding@gmail.com>, Lee Jones <lee.jones@linaro.org>, Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec <jernej.skrabec@siol.net>, linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-sunxi@googlegroups.com, Roman Beranek <roman.beranek@prusa3d.com> Subject: [PATCH] pwm: sun4i: Avoid waiting until the next period Date: Wed, 12 May 2021 00:00:14 +0200 [thread overview] Message-ID: <20210511220014.1945519-1-roman.beranek@prusa3d.com> (raw) As disabling PWM by clearing the PWM_EN bit doesn't take an effect until the last pulse cycle ends, gating the clock too soon may result in the output signal getting stuck in an active state. Although the code gives an appearance that it takes care of this particular problem by waiting for the next period before finally clearing the CLK_GATING and EN bits, unless the EN bit has already been cleared by the time the delay begins, this measure doesn't achieve anything. However, even if this detail were to be fixed, there would still remain another issue to deal with: if the PWM were to be disabled shortly after having its period shortened, the length of the delay might turn out insufficient. So instead of waiting for the moment when it becomes safe to gate the clock, let's not bother gating it in the first place. Signed-off-by: Roman Beranek <roman.beranek@prusa3d.com> Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> --- drivers/pwm/pwm-sun4i.c | 52 +++++++++++------------------------------ 1 file changed, 13 insertions(+), 39 deletions(-) diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c index e01becd10..809163186 100644 --- a/drivers/pwm/pwm-sun4i.c +++ b/drivers/pwm/pwm-sun4i.c @@ -89,7 +89,6 @@ struct sun4i_pwm_chip { void __iomem *base; spinlock_t ctrl_lock; const struct sun4i_pwm_data *data; - unsigned long next_period[2]; }; static inline struct sun4i_pwm_chip *to_sun4i_pwm_chip(struct pwm_chip *chip) @@ -235,26 +234,15 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, struct pwm_state cstate; u32 ctrl, duty = 0, period = 0, val; int ret; - unsigned int delay_us, prescaler = 0; - unsigned long now; + unsigned int prescaler = 0; bool bypass; pwm_get_state(pwm, &cstate); - if (!cstate.enabled) { - ret = clk_prepare_enable(sun4i_pwm->clk); - if (ret) { - dev_err(chip->dev, "failed to enable PWM clock\n"); - return ret; - } - } - ret = sun4i_pwm_calculate(sun4i_pwm, state, &duty, &period, &prescaler, &bypass); if (ret) { dev_err(chip->dev, "period exceeds the maximum value\n"); - if (!cstate.enabled) - clk_disable_unprepare(sun4i_pwm->clk); return ret; } @@ -284,8 +272,6 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, val = (duty & PWM_DTY_MASK) | PWM_PRD(period); sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm)); - sun4i_pwm->next_period[pwm->hwpwm] = jiffies + - nsecs_to_jiffies(cstate.period + 1000); if (state->polarity != PWM_POLARITY_NORMAL) ctrl &= ~BIT_CH(PWM_ACT_STATE, pwm->hwpwm); @@ -296,34 +282,12 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, if (state->enabled) ctrl |= BIT_CH(PWM_EN, pwm->hwpwm); + else + ctrl &= ~BIT_CH(PWM_EN, pwm->hwpwm); sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG); - - spin_unlock(&sun4i_pwm->ctrl_lock); - - if (state->enabled) - return 0; - - /* We need a full period to elapse before disabling the channel. */ - now = jiffies; - if (time_before(now, sun4i_pwm->next_period[pwm->hwpwm])) { - delay_us = jiffies_to_usecs(sun4i_pwm->next_period[pwm->hwpwm] - - now); - if ((delay_us / 500) > MAX_UDELAY_MS) - msleep(delay_us / 1000 + 1); - else - usleep_range(delay_us, delay_us * 2); - } - - spin_lock(&sun4i_pwm->ctrl_lock); - ctrl = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG); - ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm); - ctrl &= ~BIT_CH(PWM_EN, pwm->hwpwm); - sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG); spin_unlock(&sun4i_pwm->ctrl_lock); - clk_disable_unprepare(sun4i_pwm->clk); - return 0; } @@ -457,6 +421,13 @@ static int sun4i_pwm_probe(struct platform_device *pdev) goto err_bus; } + ret = clk_prepare_enable(pwm->clk); + if (ret) { + dev_err(&pdev->dev, "failed to prepare and enable PWM clock %pe\n", + ERR_PTR(ret)); + goto err_clk; + } + pwm->chip.dev = &pdev->dev; pwm->chip.ops = &sun4i_pwm_ops; pwm->chip.npwm = pwm->data->npwm; @@ -476,6 +447,8 @@ static int sun4i_pwm_probe(struct platform_device *pdev) return 0; err_pwm_add: + clk_disable_unprepare(pwm->clk); +err_clk: clk_disable_unprepare(pwm->bus_clk); err_bus: reset_control_assert(pwm->rst); @@ -492,6 +465,7 @@ static int sun4i_pwm_remove(struct platform_device *pdev) if (ret) return ret; + clk_disable_unprepare(pwm->clk); clk_disable_unprepare(pwm->bus_clk); reset_control_assert(pwm->rst); -- 2.31.1
WARNING: multiple messages have this Message-ID (diff)
From: Roman Beranek <roman.beranek@prusa3d.cz> To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de> Cc: Thierry Reding <thierry.reding@gmail.com>, Lee Jones <lee.jones@linaro.org>, Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec <jernej.skrabec@siol.net>, linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-sunxi@googlegroups.com, Roman Beranek <roman.beranek@prusa3d.com> Subject: [PATCH] pwm: sun4i: Avoid waiting until the next period Date: Wed, 12 May 2021 00:00:14 +0200 [thread overview] Message-ID: <20210511220014.1945519-1-roman.beranek@prusa3d.com> (raw) As disabling PWM by clearing the PWM_EN bit doesn't take an effect until the last pulse cycle ends, gating the clock too soon may result in the output signal getting stuck in an active state. Although the code gives an appearance that it takes care of this particular problem by waiting for the next period before finally clearing the CLK_GATING and EN bits, unless the EN bit has already been cleared by the time the delay begins, this measure doesn't achieve anything. However, even if this detail were to be fixed, there would still remain another issue to deal with: if the PWM were to be disabled shortly after having its period shortened, the length of the delay might turn out insufficient. So instead of waiting for the moment when it becomes safe to gate the clock, let's not bother gating it in the first place. Signed-off-by: Roman Beranek <roman.beranek@prusa3d.com> Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> --- drivers/pwm/pwm-sun4i.c | 52 +++++++++++------------------------------ 1 file changed, 13 insertions(+), 39 deletions(-) diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c index e01becd10..809163186 100644 --- a/drivers/pwm/pwm-sun4i.c +++ b/drivers/pwm/pwm-sun4i.c @@ -89,7 +89,6 @@ struct sun4i_pwm_chip { void __iomem *base; spinlock_t ctrl_lock; const struct sun4i_pwm_data *data; - unsigned long next_period[2]; }; static inline struct sun4i_pwm_chip *to_sun4i_pwm_chip(struct pwm_chip *chip) @@ -235,26 +234,15 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, struct pwm_state cstate; u32 ctrl, duty = 0, period = 0, val; int ret; - unsigned int delay_us, prescaler = 0; - unsigned long now; + unsigned int prescaler = 0; bool bypass; pwm_get_state(pwm, &cstate); - if (!cstate.enabled) { - ret = clk_prepare_enable(sun4i_pwm->clk); - if (ret) { - dev_err(chip->dev, "failed to enable PWM clock\n"); - return ret; - } - } - ret = sun4i_pwm_calculate(sun4i_pwm, state, &duty, &period, &prescaler, &bypass); if (ret) { dev_err(chip->dev, "period exceeds the maximum value\n"); - if (!cstate.enabled) - clk_disable_unprepare(sun4i_pwm->clk); return ret; } @@ -284,8 +272,6 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, val = (duty & PWM_DTY_MASK) | PWM_PRD(period); sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm)); - sun4i_pwm->next_period[pwm->hwpwm] = jiffies + - nsecs_to_jiffies(cstate.period + 1000); if (state->polarity != PWM_POLARITY_NORMAL) ctrl &= ~BIT_CH(PWM_ACT_STATE, pwm->hwpwm); @@ -296,34 +282,12 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, if (state->enabled) ctrl |= BIT_CH(PWM_EN, pwm->hwpwm); + else + ctrl &= ~BIT_CH(PWM_EN, pwm->hwpwm); sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG); - - spin_unlock(&sun4i_pwm->ctrl_lock); - - if (state->enabled) - return 0; - - /* We need a full period to elapse before disabling the channel. */ - now = jiffies; - if (time_before(now, sun4i_pwm->next_period[pwm->hwpwm])) { - delay_us = jiffies_to_usecs(sun4i_pwm->next_period[pwm->hwpwm] - - now); - if ((delay_us / 500) > MAX_UDELAY_MS) - msleep(delay_us / 1000 + 1); - else - usleep_range(delay_us, delay_us * 2); - } - - spin_lock(&sun4i_pwm->ctrl_lock); - ctrl = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG); - ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm); - ctrl &= ~BIT_CH(PWM_EN, pwm->hwpwm); - sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG); spin_unlock(&sun4i_pwm->ctrl_lock); - clk_disable_unprepare(sun4i_pwm->clk); - return 0; } @@ -457,6 +421,13 @@ static int sun4i_pwm_probe(struct platform_device *pdev) goto err_bus; } + ret = clk_prepare_enable(pwm->clk); + if (ret) { + dev_err(&pdev->dev, "failed to prepare and enable PWM clock %pe\n", + ERR_PTR(ret)); + goto err_clk; + } + pwm->chip.dev = &pdev->dev; pwm->chip.ops = &sun4i_pwm_ops; pwm->chip.npwm = pwm->data->npwm; @@ -476,6 +447,8 @@ static int sun4i_pwm_probe(struct platform_device *pdev) return 0; err_pwm_add: + clk_disable_unprepare(pwm->clk); +err_clk: clk_disable_unprepare(pwm->bus_clk); err_bus: reset_control_assert(pwm->rst); @@ -492,6 +465,7 @@ static int sun4i_pwm_remove(struct platform_device *pdev) if (ret) return ret; + clk_disable_unprepare(pwm->clk); clk_disable_unprepare(pwm->bus_clk); reset_control_assert(pwm->rst); -- 2.31.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2021-05-11 22:01 UTC|newest] Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-11 22:00 Roman Beranek [this message] 2021-05-11 22:00 ` [PATCH] pwm: sun4i: Avoid waiting until the next period Roman Beranek 2021-05-12 0:55 ` Emil Lenngren 2021-05-12 0:55 ` Emil Lenngren 2021-05-12 4:13 ` Roman Beranek 2021-05-12 4:13 ` Roman Beranek 2021-05-12 4:41 ` Uwe Kleine-König 2021-05-12 4:41 ` Uwe Kleine-König 2021-05-12 9:18 ` Emil Lenngren 2021-05-12 9:18 ` Emil Lenngren 2021-05-12 9:18 ` Emil Lenngren 2021-05-25 16:41 ` Thierry Reding 2021-05-25 16:41 ` Thierry Reding 2021-05-27 12:10 ` Roman Beranek 2021-05-27 12:10 ` Roman Beranek 2021-05-27 13:53 ` Alexandre Belloni 2021-05-27 13:53 ` Alexandre Belloni 2021-06-25 17:25 ` Uwe Kleine-König 2021-06-25 17:25 ` Uwe Kleine-König 2021-05-12 5:31 ` Roman Beranek 2021-05-12 5:31 ` Roman Beranek
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