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From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [CI 7/7] drm/i915/perf: Enable OA formats for ADL_P
Date: Tue, 11 May 2021 21:21:44 -0700	[thread overview]
Message-ID: <20210512042144.2089071-8-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20210512042144.2089071-1-matthew.d.roper@intel.com>

From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>

Enable relevant OA formats for ADL_P.

Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
 drivers/gpu/drm/i915/i915_perf.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 85ad62dbabfa..de8ebc34af0f 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -4318,6 +4318,7 @@ static void oa_init_supported_formats(struct i915_perf *perf)
 	case INTEL_ROCKETLAKE:
 	case INTEL_DG1:
 	case INTEL_ALDERLAKE_S:
+	case INTEL_ALDERLAKE_P:
 		oa_format_add(perf, I915_OA_FORMAT_A12);
 		oa_format_add(perf, I915_OA_FORMAT_A12_B8_C8);
 		oa_format_add(perf, I915_OA_FORMAT_A32u40_A4u32_B8_C8);
-- 
2.25.4

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  parent reply	other threads:[~2021-05-12  4:22 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-12  4:21 [Intel-gfx] [CI 0/7] CI pass for reviewed XeLPD / ADL-P patches Matt Roper
2021-05-12  4:21 ` [Intel-gfx] [CI 1/7] drm/i915/xelpd: Handle proper AUX interrupt bits Matt Roper
2021-05-12  4:21 ` [Intel-gfx] [CI 2/7] drm/i915/xelpd: Define plane capabilities Matt Roper
2021-05-12  4:21 ` [Intel-gfx] [CI 3/7] drm/i915/xelpd: Add XE_LPD power wells Matt Roper
2021-05-12  4:21 ` [Intel-gfx] [CI 4/7] drm/i915/xelpd: Required bandwidth increases when VT-d is active Matt Roper
2021-05-12  4:21 ` [Intel-gfx] [CI 5/7] drm/i915/xelpd: Add Wa_14011503030 Matt Roper
2021-05-12  4:21 ` [Intel-gfx] [CI 6/7] drm/i915/adl_p: Add PCH support Matt Roper
2021-05-12  4:21 ` Matt Roper [this message]
2021-05-12  4:40 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for CI pass for reviewed XeLPD / ADL-P patches Patchwork
2021-05-12  5:10 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-05-12  5:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for CI pass for reviewed XeLPD / ADL-P patches (rev2) Patchwork
2021-05-12  6:13 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-05-12 16:18   ` Matt Roper
2021-05-12 16:43     ` Vudum, Lakshminarayana
2021-05-12 17:45     ` Vudum, Lakshminarayana
2021-05-12 17:23 ` Patchwork
2021-05-12 17:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-12 19:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for CI pass for reviewed XeLPD / ADL-P patches (rev3) Patchwork
2021-05-12 20:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-12 21:47 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for CI pass for reviewed XeLPD / ADL-P patches (rev2) Patchwork
2021-05-13  0:02   ` Matt Roper
2021-05-13  1:21 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for CI pass for reviewed XeLPD / ADL-P patches (rev3) Patchwork

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