All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jonathan Marek <jonathan@marek.ca>
To: freedreno@lists.freedesktop.org
Cc: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	Jordan Crouse <jordan@cosmicpenguin.net>,
	Eric Anholt <eric@anholt.net>,
	Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	Sharat Masetty <smasetty@codeaurora.org>,
	Douglas Anderson <dianders@chromium.org>,
	linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM
	ADRENO GPU),
	dri-devel@lists.freedesktop.org (open list:DRM DRIVER FOR MSM
	ADRENO GPU), linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v2 3/8] drm/msm/a6xx: fix incorrectly set uavflagprd_inv field for A650
Date: Thu, 13 May 2021 13:13:58 -0400	[thread overview]
Message-ID: <20210513171431.18632-4-jonathan@marek.ca> (raw)
In-Reply-To: <20210513171431.18632-1-jonathan@marek.ca>

Value was shifted in the wrong direction, resulting in the field always
being zero, which is incorrect for A650.

Fixes: d0bac4e9cd66 ("drm/msm/a6xx: set ubwc config for A640 and A650")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
---
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 727d111a413f..45a6a0fce7d7 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -489,7 +489,7 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu)
 		rgb565_predicator << 11 | amsbc << 4 | lower_bit << 1);
 	gpu_write(gpu, REG_A6XX_TPL1_NC_MODE_CNTL, lower_bit << 1);
 	gpu_write(gpu, REG_A6XX_SP_NC_MODE_CNTL,
-		uavflagprd_inv >> 4 | lower_bit << 1);
+		uavflagprd_inv << 4 | lower_bit << 1);
 	gpu_write(gpu, REG_A6XX_UCHE_MODE_CNTL, lower_bit << 21);
 }
 
-- 
2.26.1


WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Marek <jonathan@marek.ca>
To: freedreno@lists.freedesktop.org
Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
	Douglas Anderson <dianders@chromium.org>,
	David Airlie <airlied@linux.ie>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU"
	<linux-arm-msm@vger.kernel.org>,
	Sharat Masetty <smasetty@codeaurora.org>,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU"
	<dri-devel@lists.freedesktop.org>,
	Jordan Crouse <jordan@cosmicpenguin.net>,
	Sean Paul <sean@poorly.run>,
	open list <linux-kernel@vger.kernel.org>
Subject: [PATCH v2 3/8] drm/msm/a6xx: fix incorrectly set uavflagprd_inv field for A650
Date: Thu, 13 May 2021 13:13:58 -0400	[thread overview]
Message-ID: <20210513171431.18632-4-jonathan@marek.ca> (raw)
In-Reply-To: <20210513171431.18632-1-jonathan@marek.ca>

Value was shifted in the wrong direction, resulting in the field always
being zero, which is incorrect for A650.

Fixes: d0bac4e9cd66 ("drm/msm/a6xx: set ubwc config for A640 and A650")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
---
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 727d111a413f..45a6a0fce7d7 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -489,7 +489,7 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu)
 		rgb565_predicator << 11 | amsbc << 4 | lower_bit << 1);
 	gpu_write(gpu, REG_A6XX_TPL1_NC_MODE_CNTL, lower_bit << 1);
 	gpu_write(gpu, REG_A6XX_SP_NC_MODE_CNTL,
-		uavflagprd_inv >> 4 | lower_bit << 1);
+		uavflagprd_inv << 4 | lower_bit << 1);
 	gpu_write(gpu, REG_A6XX_UCHE_MODE_CNTL, lower_bit << 21);
 }
 
-- 
2.26.1


  parent reply	other threads:[~2021-05-13 17:17 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-13 17:13 [PATCH v2 0/8] drm/msm/a6xx: add support for Adreno 660 GPU Jonathan Marek
2021-05-13 17:13 ` Jonathan Marek
2021-05-13 17:13 ` [PATCH v2 1/8] drm/msm: remove unused icc_path/ocmem_icc_path Jonathan Marek
2021-05-13 17:13   ` Jonathan Marek
2021-05-31  7:26   ` Akhil P Oommen
2021-05-31  7:26     ` Akhil P Oommen
2021-05-13 17:13 ` [PATCH v2 2/8] drm/msm/a6xx: use AOP-initialized PDC for a650 Jonathan Marek
2021-05-13 17:13   ` Jonathan Marek
2021-05-31  7:24   ` Akhil P Oommen
2021-05-31  7:24     ` Akhil P Oommen
2021-06-08 15:54     ` Jonathan Marek
2021-06-08 15:54       ` Jonathan Marek
2021-05-13 17:13 ` Jonathan Marek [this message]
2021-05-13 17:13   ` [PATCH v2 3/8] drm/msm/a6xx: fix incorrectly set uavflagprd_inv field for A650 Jonathan Marek
2021-05-31  7:33   ` Akhil P Oommen
2021-05-31  7:33     ` Akhil P Oommen
2021-05-13 17:13 ` [PATCH v2 4/8] drm/msm/a6xx: update/fix CP_PROTECT initialization Jonathan Marek
2021-05-13 17:13   ` Jonathan Marek
2021-05-31  8:09   ` Akhil P Oommen
2021-05-31  8:09     ` Akhil P Oommen
2021-05-13 17:14 ` [PATCH v2 5/8] drm/msm/a6xx: avoid shadow NULL reference in failure path Jonathan Marek
2021-05-13 17:14   ` Jonathan Marek
2021-05-31  9:25   ` Akhil P Oommen
2021-05-31  9:25     ` Akhil P Oommen
2021-05-13 17:14 ` [PATCH v2 6/8] drm/msm/a6xx: add support for Adreno 660 GPU Jonathan Marek
2021-05-13 17:14   ` Jonathan Marek
2021-05-31 15:05   ` Akhil P Oommen
2021-05-31 15:05     ` Akhil P Oommen
2021-06-08 16:53     ` Jonathan Marek
2021-06-08 16:53       ` Jonathan Marek
2021-05-13 17:14 ` [PATCH v2 7/8] drm/msm/a6xx: update a6xx_ucode_check_version for a660 Jonathan Marek
2021-05-13 17:14   ` Jonathan Marek
2021-05-31 15:06   ` Akhil P Oommen
2021-05-31 15:06     ` Akhil P Oommen
2021-05-13 17:14 ` [PATCH v2 8/8] drm/msm/a6xx: add a660 hwcg table Jonathan Marek
2021-05-13 17:14   ` Jonathan Marek
2021-05-31 15:10   ` Akhil P Oommen
2021-05-31 15:10     ` Akhil P Oommen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210513171431.18632-4-jonathan@marek.ca \
    --to=jonathan@marek.ca \
    --cc=airlied@linux.ie \
    --cc=akhilpo@codeaurora.org \
    --cc=daniel@ffwll.ch \
    --cc=dianders@chromium.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=eric@anholt.net \
    --cc=freedreno@lists.freedesktop.org \
    --cc=jordan@cosmicpenguin.net \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=robdclark@gmail.com \
    --cc=saiprakash.ranjan@codeaurora.org \
    --cc=sean@poorly.run \
    --cc=smasetty@codeaurora.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.