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From: Fuad Tabba <tabba@google.com>
To: linux-arm-kernel@lists.infradead.org
Cc: will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com,
	 maz@kernel.org, ardb@kernel.org, james.morse@arm.com,
	 alexandru.elisei@arm.com, suzuki.poulose@arm.com,
	robin.murphy@arm.com,  tabba@google.com
Subject: [PATCH v2 09/16] arm64: dcache_by_line_op to take end parameter instead of size
Date: Mon, 17 May 2021 08:51:17 +0100	[thread overview]
Message-ID: <20210517075124.152151-10-tabba@google.com> (raw)
In-Reply-To: <20210517075124.152151-1-tabba@google.com>

To be consistent with other functions with similar names and
functionality in cacheflush.h, cache.S, and cachetlb.rst, change
to specify the range in terms of start and end, as opposed to
start and size.

No functional change intended.

Reported-by: Will Deacon <will@kernel.org>
Signed-off-by: Fuad Tabba <tabba@google.com>
---
 arch/arm64/include/asm/assembler.h | 27 +++++++++++++--------------
 arch/arm64/kvm/hyp/nvhe/cache.S    |  1 +
 arch/arm64/mm/cache.S              |  5 +++++
 3 files changed, 19 insertions(+), 14 deletions(-)

diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 2bcfc5fdfafd..3f75a600e6c0 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -385,39 +385,38 @@ alternative_endif
 
 /*
  * Macro to perform a data cache maintenance for the interval
- * [kaddr, kaddr + size)
+ * [start, end)
  *
  * 	op:		operation passed to dc instruction
  * 	domain:		domain used in dsb instruciton
- * 	kaddr:		starting virtual address of the region
- * 	size:		size of the region
- * 	Corrupts:	kaddr, size, tmp1, tmp2
+ * 	start:		starting virtual address of the region
+ * 	end:		end virtual address of the region
+ * 	Corrupts:	start, end, tmp1, tmp2
  */
-	.macro dcache_by_line_op op, domain, kaddr, size, tmp1, tmp2
+	.macro dcache_by_line_op op, domain, start, end, tmp1, tmp2
 	dcache_line_size \tmp1, \tmp2
-	add	\size, \kaddr, \size
 	sub	\tmp2, \tmp1, #1
-	bic	\kaddr, \kaddr, \tmp2
+	bic	\start, \start, \tmp2
 9998:
 	.ifc	\op, cvau
-	__dcache_op_workaround_clean_cache \op, \kaddr
+	__dcache_op_workaround_clean_cache \op, \start
 	.else
 	.ifc	\op, cvac
-	__dcache_op_workaround_clean_cache \op, \kaddr
+	__dcache_op_workaround_clean_cache \op, \start
 	.else
 	.ifc	\op, cvap
-	sys	3, c7, c12, 1, \kaddr	// dc cvap
+	sys	3, c7, c12, 1, \start	// dc cvap
 	.else
 	.ifc	\op, cvadp
-	sys	3, c7, c13, 1, \kaddr	// dc cvadp
+	sys	3, c7, c13, 1, \start	// dc cvadp
 	.else
-	dc	\op, \kaddr
+	dc	\op, \start
 	.endif
 	.endif
 	.endif
 	.endif
-	add	\kaddr, \kaddr, \tmp1
-	cmp	\kaddr, \size
+	add	\start, \start, \tmp1
+	cmp	\start, \end
 	b.lo	9998b
 	dsb	\domain
 	.endm
diff --git a/arch/arm64/kvm/hyp/nvhe/cache.S b/arch/arm64/kvm/hyp/nvhe/cache.S
index 36cef6915428..3bcfa3cac46f 100644
--- a/arch/arm64/kvm/hyp/nvhe/cache.S
+++ b/arch/arm64/kvm/hyp/nvhe/cache.S
@@ -8,6 +8,7 @@
 #include <asm/alternative.h>
 
 SYM_FUNC_START_PI(__flush_dcache_area)
+	add	x1, x0, x1
 	dcache_by_line_op civac, sy, x0, x1, x2, x3
 	ret
 SYM_FUNC_END_PI(__flush_dcache_area)
diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
index 16660cbc45bf..b599c334a2e8 100644
--- a/arch/arm64/mm/cache.S
+++ b/arch/arm64/mm/cache.S
@@ -119,6 +119,7 @@ SYM_FUNC_END(invalidate_icache_range)
  *	- size    - size in question
  */
 SYM_FUNC_START_PI(__flush_dcache_area)
+	add	x1, x0, x1
 	dcache_by_line_op civac, sy, x0, x1, x2, x3
 	ret
 SYM_FUNC_END_PI(__flush_dcache_area)
@@ -137,6 +138,7 @@ alternative_if ARM64_HAS_CACHE_IDC
 	dsb	ishst
 	ret
 alternative_else_nop_endif
+	add	x1, x0, x1
 	dcache_by_line_op cvau, ish, x0, x1, x2, x3
 	ret
 SYM_FUNC_END(__clean_dcache_area_pou)
@@ -198,6 +200,7 @@ SYM_FUNC_START_PI(__clean_dcache_area_poc)
  *	- start   - virtual start address of region
  *	- size    - size in question
  */
+	add	x1, x0, x1
 	dcache_by_line_op cvac, sy, x0, x1, x2, x3
 	ret
 SYM_FUNC_END_PI(__clean_dcache_area_poc)
@@ -216,6 +219,7 @@ SYM_FUNC_START_PI(__clean_dcache_area_pop)
 	alternative_if_not ARM64_HAS_DCPOP
 	b	__clean_dcache_area_poc
 	alternative_else_nop_endif
+	add	x1, x0, x1
 	dcache_by_line_op cvap, sy, x0, x1, x2, x3
 	ret
 SYM_FUNC_END_PI(__clean_dcache_area_pop)
@@ -229,6 +233,7 @@ SYM_FUNC_END_PI(__clean_dcache_area_pop)
  *	- size    - size in question
  */
 SYM_FUNC_START_PI(__dma_flush_area)
+	add	x1, x0, x1
 	dcache_by_line_op civac, sy, x0, x1, x2, x3
 	ret
 SYM_FUNC_END_PI(__dma_flush_area)
-- 
2.31.1.751.gd2f1c929bd-goog


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  parent reply	other threads:[~2021-05-17  8:02 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-17  7:51 [PATCH v2 00/16] Tidy up cache.S Fuad Tabba
2021-05-17  7:51 ` [PATCH v2 01/16] arm64: Apply errata to swsusp_arch_suspend_exit Fuad Tabba
2021-05-17  7:51 ` [PATCH v2 02/16] arm64: Do not enable uaccess for flush_icache_range Fuad Tabba
2021-05-18 15:33   ` Mark Rutland
2021-05-19 16:25     ` Fuad Tabba
2021-05-20 10:47       ` Mark Rutland
2021-05-17  7:51 ` [PATCH v2 03/16] arm64: Do not enable uaccess for invalidate_icache_range Fuad Tabba
2021-05-18 15:36   ` Mark Rutland
2021-05-19 16:26     ` Fuad Tabba
2021-05-17  7:51 ` [PATCH v2 04/16] arm64: Downgrade flush_icache_range to invalidate Fuad Tabba
2021-05-18 15:53   ` Mark Rutland
2021-05-18 16:02     ` Ard Biesheuvel
2021-05-18 16:06       ` Mark Rutland
2021-05-19 16:29         ` Fuad Tabba
2021-05-17  7:51 ` [PATCH v2 05/16] arm64: Remove uaccess toggle from __flush_cache_range macro Fuad Tabba
2021-05-18 16:00   ` Mark Rutland
2021-05-19 16:27     ` Fuad Tabba
2021-05-17  7:51 ` [PATCH v2 06/16] arm64: Move documentation of dcache_by_line_op Fuad Tabba
2021-05-17  7:51 ` [PATCH v2 07/16] arm64: Fix comments to refer to correct function __flush_icache_range Fuad Tabba
2021-05-18 16:03   ` Mark Rutland
2021-05-17  7:51 ` [PATCH v2 08/16] arm64: __inval_dcache_area to take end parameter instead of size Fuad Tabba
2021-05-17  7:51 ` Fuad Tabba [this message]
2021-05-17  7:51 ` [PATCH v2 10/16] arm64: __flush_dcache_area " Fuad Tabba
2021-05-17  7:51 ` [PATCH v2 11/16] arm64: __clean_dcache_area_poc " Fuad Tabba
2021-05-17  7:51 ` [PATCH v2 12/16] arm64: __clean_dcache_area_pop " Fuad Tabba
2021-05-17  7:51 ` [PATCH v2 13/16] arm64: __clean_dcache_area_pou " Fuad Tabba
2021-05-17  7:51 ` [PATCH v2 14/16] arm64: sync_icache_aliases " Fuad Tabba
2021-05-17  7:51 ` [PATCH v2 15/16] arm64: Fix cache maintenance function comments Fuad Tabba
2021-05-17  7:51 ` [PATCH v2 16/16] arm64: Rename arm64-internal cache maintenance functions Fuad Tabba

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