From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Peter Xu" <peterx@redhat.com>, "Bibo Mao" <maobibo@loongson.cn>,
"Stefan Hajnoczi" <stefanha@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [RFC PATCH 06/12] exec/memory_ldst_cached: Set MemTxResult on success
Date: Thu, 20 May 2021 13:09:13 +0200 [thread overview]
Message-ID: <20210520110919.2483190-7-philmd@redhat.com> (raw)
In-Reply-To: <20210520110919.2483190-1-philmd@redhat.com>
If the caller passed a MemTxResult argument, we must fill
it with the transaction result. We do it when no cache is
present, complete the other case (which is always successful).
Fixes: 48564041a73 ("exec: reintroduce MemoryRegion caching")
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/exec/memory_ldst_cached.h.inc | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/include/exec/memory_ldst_cached.h.inc b/include/exec/memory_ldst_cached.h.inc
index d7834f852c4..a8f146251d4 100644
--- a/include/exec/memory_ldst_cached.h.inc
+++ b/include/exec/memory_ldst_cached.h.inc
@@ -30,6 +30,9 @@ static inline uint16_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache,
assert(addr < cache->len && 2 <= cache->len - addr);
fuzz_dma_read_cb(cache->xlat + addr, 2, cache->mrs.mr);
if (likely(cache->ptr)) {
+ if (result) {
+ *result = MEMTX_OK;
+ }
return LD_P(uw)(cache->ptr + addr);
} else {
return ADDRESS_SPACE_LD_CACHED_SLOW(uw)(cache, addr, attrs, result);
@@ -42,6 +45,9 @@ static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryRegionCache *cache,
assert(addr < cache->len && 4 <= cache->len - addr);
fuzz_dma_read_cb(cache->xlat + addr, 4, cache->mrs.mr);
if (likely(cache->ptr)) {
+ if (result) {
+ *result = MEMTX_OK;
+ }
return LD_P(l)(cache->ptr + addr);
} else {
return ADDRESS_SPACE_LD_CACHED_SLOW(l)(cache, addr, attrs, result);
@@ -54,6 +60,9 @@ static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache,
assert(addr < cache->len && 8 <= cache->len - addr);
fuzz_dma_read_cb(cache->xlat + addr, 8, cache->mrs.mr);
if (likely(cache->ptr)) {
+ if (result) {
+ *result = MEMTX_OK;
+ }
return LD_P(q)(cache->ptr + addr);
} else {
return ADDRESS_SPACE_LD_CACHED_SLOW(q)(cache, addr, attrs, result);
@@ -76,6 +85,9 @@ static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache,
{
assert(addr < cache->len && 2 <= cache->len - addr);
if (likely(cache->ptr)) {
+ if (result) {
+ *result = MEMTX_OK;
+ }
ST_P(w)(cache->ptr + addr, val);
} else {
ADDRESS_SPACE_ST_CACHED_SLOW(w)(cache, addr, val, attrs, result);
@@ -87,6 +99,9 @@ static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache,
{
assert(addr < cache->len && 4 <= cache->len - addr);
if (likely(cache->ptr)) {
+ if (result) {
+ *result = MEMTX_OK;
+ }
ST_P(l)(cache->ptr + addr, val);
} else {
ADDRESS_SPACE_ST_CACHED_SLOW(l)(cache, addr, val, attrs, result);
@@ -98,6 +113,9 @@ static inline void ADDRESS_SPACE_ST_CACHED(q)(MemoryRegionCache *cache,
{
assert(addr < cache->len && 8 <= cache->len - addr);
if (likely(cache->ptr)) {
+ if (result) {
+ *result = MEMTX_OK;
+ }
ST_P(q)(cache->ptr + addr, val);
} else {
ADDRESS_SPACE_ST_CACHED_SLOW(q)(cache, addr, val, attrs, result);
--
2.26.3
next prev parent reply other threads:[~2021-05-20 11:14 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-20 11:09 [RFC PATCH 00/12] exec/memory: Experimental API to catch unaligned accesses Philippe Mathieu-Daudé
2021-05-20 11:09 ` [RFC PATCH 01/12] exec/memory_ldst: Use correct type sizes Philippe Mathieu-Daudé
2021-05-20 11:09 ` [RFC PATCH 02/12] exec/memattrs: Add attribute/error for address alignment Philippe Mathieu-Daudé
2021-06-02 12:39 ` Stefan Hajnoczi
2021-05-20 11:09 ` [RFC PATCH 03/12] exec/memory_ldst: Return MEMTX_UNALIGNED_ERROR for unaligned addresses Philippe Mathieu-Daudé
2021-05-20 11:09 ` [RFC PATCH 04/12] exec/memory_ldst_cached: Sort declarations Philippe Mathieu-Daudé
2021-05-20 11:09 ` [RFC PATCH 05/12] exec/memory_ldst_cached: Use correct type size Philippe Mathieu-Daudé
2021-05-20 11:09 ` Philippe Mathieu-Daudé [this message]
2021-05-20 11:09 ` [RFC PATCH 07/12] exec/memory_ldst_cached: Document aligned addresses are expected Philippe Mathieu-Daudé
2021-05-20 11:09 ` [RFC PATCH 08/12] exec/memory_ldst_cached: Check address alignment if requested Philippe Mathieu-Daudé
2021-05-20 11:09 ` [RFC PATCH 09/12] hw/virtio: Use correct type sizes Philippe Mathieu-Daudé
2021-05-20 11:09 ` [RFC PATCH 10/12] hw/virtio: Extract virtio_lduw_phys_cached_with_attrs() Philippe Mathieu-Daudé
2021-05-20 11:09 ` [RFC PATCH 11/12] hw/virtio: Have vring_avail_flags() return a boolean value Philippe Mathieu-Daudé
2021-05-20 11:09 ` [RFC PATCH 12/12] hw/virtio: Display error if vring flag field is not aligned Philippe Mathieu-Daudé
2021-06-02 12:44 ` Stefan Hajnoczi
2021-06-01 3:32 ` [RFC PATCH 00/12] exec/memory: Experimental API to catch unaligned accesses Philippe Mathieu-Daudé
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