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From: Matthew Brost <matthew.brost@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>
Cc: Michal.Wajdeczko@intel.com
Subject: [PATCH 02/17] drm/i915/guc: use probe_error log for CT enablement failure
Date: Tue, 25 May 2021 14:15:26 -0700	[thread overview]
Message-ID: <20210525211541.87696-3-matthew.brost@intel.com> (raw)
In-Reply-To: <20210525211541.87696-1-matthew.brost@intel.com>

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

We have a couple of failure injection points in the CT enablement path,
so we need to use i915_probe_error() to select the appropriate log level.
A new macro (CT_PROBE_ERROR) has been added to the set of CT logging
macros to be used in this scenario and upcoming ones.

While adding the new macros, fix the underlying logging mechanics used
by the existing ones (DRM_DEV_* -> drm_*) and move the inlines to
before they're used inside the macros.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 48 ++++++++++++-----------
 1 file changed, 25 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index fa9e048cc65f..25618649048f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -7,14 +7,36 @@
 #include "intel_guc_ct.h"
 #include "gt/intel_gt.h"
 
+static inline struct intel_guc *ct_to_guc(struct intel_guc_ct *ct)
+{
+	return container_of(ct, struct intel_guc, ct);
+}
+
+static inline struct intel_gt *ct_to_gt(struct intel_guc_ct *ct)
+{
+	return guc_to_gt(ct_to_guc(ct));
+}
+
+static inline struct drm_i915_private *ct_to_i915(struct intel_guc_ct *ct)
+{
+	return ct_to_gt(ct)->i915;
+}
+
+static inline struct drm_device *ct_to_drm(struct intel_guc_ct *ct)
+{
+	return &ct_to_i915(ct)->drm;
+}
+
 #define CT_ERROR(_ct, _fmt, ...) \
-	DRM_DEV_ERROR(ct_to_dev(_ct), "CT: " _fmt, ##__VA_ARGS__)
+	drm_err(ct_to_drm(_ct), "CT: " _fmt, ##__VA_ARGS__)
 #ifdef CONFIG_DRM_I915_DEBUG_GUC
 #define CT_DEBUG(_ct, _fmt, ...) \
-	DRM_DEV_DEBUG_DRIVER(ct_to_dev(_ct), "CT: " _fmt, ##__VA_ARGS__)
+	drm_dbg(ct_to_drm(_ct), "CT: " _fmt, ##__VA_ARGS__)
 #else
 #define CT_DEBUG(...)	do { } while (0)
 #endif
+#define CT_PROBE_ERROR(_ct, _fmt, ...) \
+	i915_probe_error(ct_to_i915(ct), "CT: " _fmt, ##__VA_ARGS__);
 
 struct ct_request {
 	struct list_head link;
@@ -47,26 +69,6 @@ void intel_guc_ct_init_early(struct intel_guc_ct *ct)
 	INIT_WORK(&ct->requests.worker, ct_incoming_request_worker_func);
 }
 
-static inline struct intel_guc *ct_to_guc(struct intel_guc_ct *ct)
-{
-	return container_of(ct, struct intel_guc, ct);
-}
-
-static inline struct intel_gt *ct_to_gt(struct intel_guc_ct *ct)
-{
-	return guc_to_gt(ct_to_guc(ct));
-}
-
-static inline struct drm_i915_private *ct_to_i915(struct intel_guc_ct *ct)
-{
-	return ct_to_gt(ct)->i915;
-}
-
-static inline struct device *ct_to_dev(struct intel_guc_ct *ct)
-{
-	return ct_to_i915(ct)->drm.dev;
-}
-
 static inline const char *guc_ct_buffer_type_to_str(u32 type)
 {
 	switch (type) {
@@ -264,7 +266,7 @@ int intel_guc_ct_enable(struct intel_guc_ct *ct)
 err_deregister:
 	ct_deregister_buffer(ct, INTEL_GUC_CT_BUFFER_TYPE_RECV);
 err_out:
-	CT_ERROR(ct, "Failed to open open CT channel (err=%d)\n", err);
+	CT_PROBE_ERROR(ct, "Failed to open channel (err=%d)\n", err);
 	return err;
 }
 
-- 
2.28.0


WARNING: multiple messages have this Message-ID (diff)
From: Matthew Brost <matthew.brost@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>
Subject: [Intel-gfx] [PATCH 02/17] drm/i915/guc: use probe_error log for CT enablement failure
Date: Tue, 25 May 2021 14:15:26 -0700	[thread overview]
Message-ID: <20210525211541.87696-3-matthew.brost@intel.com> (raw)
In-Reply-To: <20210525211541.87696-1-matthew.brost@intel.com>

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

We have a couple of failure injection points in the CT enablement path,
so we need to use i915_probe_error() to select the appropriate log level.
A new macro (CT_PROBE_ERROR) has been added to the set of CT logging
macros to be used in this scenario and upcoming ones.

While adding the new macros, fix the underlying logging mechanics used
by the existing ones (DRM_DEV_* -> drm_*) and move the inlines to
before they're used inside the macros.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 48 ++++++++++++-----------
 1 file changed, 25 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index fa9e048cc65f..25618649048f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -7,14 +7,36 @@
 #include "intel_guc_ct.h"
 #include "gt/intel_gt.h"
 
+static inline struct intel_guc *ct_to_guc(struct intel_guc_ct *ct)
+{
+	return container_of(ct, struct intel_guc, ct);
+}
+
+static inline struct intel_gt *ct_to_gt(struct intel_guc_ct *ct)
+{
+	return guc_to_gt(ct_to_guc(ct));
+}
+
+static inline struct drm_i915_private *ct_to_i915(struct intel_guc_ct *ct)
+{
+	return ct_to_gt(ct)->i915;
+}
+
+static inline struct drm_device *ct_to_drm(struct intel_guc_ct *ct)
+{
+	return &ct_to_i915(ct)->drm;
+}
+
 #define CT_ERROR(_ct, _fmt, ...) \
-	DRM_DEV_ERROR(ct_to_dev(_ct), "CT: " _fmt, ##__VA_ARGS__)
+	drm_err(ct_to_drm(_ct), "CT: " _fmt, ##__VA_ARGS__)
 #ifdef CONFIG_DRM_I915_DEBUG_GUC
 #define CT_DEBUG(_ct, _fmt, ...) \
-	DRM_DEV_DEBUG_DRIVER(ct_to_dev(_ct), "CT: " _fmt, ##__VA_ARGS__)
+	drm_dbg(ct_to_drm(_ct), "CT: " _fmt, ##__VA_ARGS__)
 #else
 #define CT_DEBUG(...)	do { } while (0)
 #endif
+#define CT_PROBE_ERROR(_ct, _fmt, ...) \
+	i915_probe_error(ct_to_i915(ct), "CT: " _fmt, ##__VA_ARGS__);
 
 struct ct_request {
 	struct list_head link;
@@ -47,26 +69,6 @@ void intel_guc_ct_init_early(struct intel_guc_ct *ct)
 	INIT_WORK(&ct->requests.worker, ct_incoming_request_worker_func);
 }
 
-static inline struct intel_guc *ct_to_guc(struct intel_guc_ct *ct)
-{
-	return container_of(ct, struct intel_guc, ct);
-}
-
-static inline struct intel_gt *ct_to_gt(struct intel_guc_ct *ct)
-{
-	return guc_to_gt(ct_to_guc(ct));
-}
-
-static inline struct drm_i915_private *ct_to_i915(struct intel_guc_ct *ct)
-{
-	return ct_to_gt(ct)->i915;
-}
-
-static inline struct device *ct_to_dev(struct intel_guc_ct *ct)
-{
-	return ct_to_i915(ct)->drm.dev;
-}
-
 static inline const char *guc_ct_buffer_type_to_str(u32 type)
 {
 	switch (type) {
@@ -264,7 +266,7 @@ int intel_guc_ct_enable(struct intel_guc_ct *ct)
 err_deregister:
 	ct_deregister_buffer(ct, INTEL_GUC_CT_BUFFER_TYPE_RECV);
 err_out:
-	CT_ERROR(ct, "Failed to open open CT channel (err=%d)\n", err);
+	CT_PROBE_ERROR(ct, "Failed to open channel (err=%d)\n", err);
 	return err;
 }
 
-- 
2.28.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2021-05-25 20:58 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-25 21:15 [PATCH 00/17] Non-interface changing GuC CTBs updates Matthew Brost
2021-05-25 21:15 ` [Intel-gfx] " Matthew Brost
2021-05-25 21:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-05-25 21:11 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-05-25 21:15 ` [PATCH 01/17] drm/i915/guc: skip disabling CTBs before sanitizing the GuC Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` Matthew Brost [this message]
2021-05-25 21:15   ` [Intel-gfx] [PATCH 02/17] drm/i915/guc: use probe_error log for CT enablement failure Matthew Brost
2021-05-25 21:15 ` [PATCH 03/17] drm/i915/guc: enable only the user interrupt when using GuC submission Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` [PATCH 04/17] drm/i915/guc: Remove sample_forcewake h2g action Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` [PATCH 05/17] drm/i915/guc: Keep strict GuC ABI definitions Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` [PATCH 06/17] drm/i915/guc: Stop using fence/status from CTB descriptor Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` [PATCH 07/17] drm/i915: Promote ptrdiff() to i915_utils.h Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` [PATCH 08/17] drm/i915/guc: Only rely on own CTB size Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` [PATCH 09/17] drm/i915/guc: Don't repeat CTB layout calculations Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` [PATCH 10/17] drm/i915/guc: Replace CTB array with explicit members Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` [PATCH 11/17] drm/i915/guc: Update sizes of CTB buffers Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` [PATCH 12/17] drm/i915/guc: Relax CTB response timeout Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` [PATCH 13/17] drm/i915/guc: Start protecting access to CTB descriptors Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` [PATCH 14/17] drm/i915/guc: Ensure H2G buffer updates visible before tail update Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` [PATCH 15/17] drm/i915/guc: Stop using mutex while sending CTB messages Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` [PATCH 16/17] drm/i915/guc: Don't receive all G2H messages in irq handler Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:15 ` [PATCH 17/17] drm/i915/guc: Always copy CT message to new allocation Matthew Brost
2021-05-25 21:15   ` [Intel-gfx] " Matthew Brost
2021-05-25 21:43 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Non-interface changing GuC CTBs updates Patchwork
2021-05-26  3:07 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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