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From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Uma Shankar <uma.shankar@intel.com>, bhanuprakash.modem@intel.com
Subject: [PATCH 2/9] drm/i915/xelpd: Define color lut range structure
Date: Tue,  1 Jun 2021 16:11:28 +0530	[thread overview]
Message-ID: <20210601104135.29020-3-uma.shankar@intel.com> (raw)
In-Reply-To: <20210601104135.29020-1-uma.shankar@intel.com>

This defines the color lut ranges for logarithmic gamma which
is being introduced from XE_LPD onwards.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 250 ++++++++++++++++++++-
 1 file changed, 246 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index dab892d2251b..0b59d8a89761 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -2093,6 +2093,238 @@ static void icl_read_luts(struct intel_crtc_state *crtc_state)
 	}
 }
 
+#define D13_GAMMA_CAPABILITY_FLAG	(DRM_MODE_LUT_GAMMA | \
+					 DRM_MODE_LUT_REFLECT_NEGATIVE | \
+					 DRM_MODE_LUT_INTERPOLATE | \
+					 DRM_MODE_LUT_NON_DECREASING)
+ /* FIXME input bpc? */
+static const struct drm_color_lut_range d13_logarithmic_gamma[] = {
+	/* segment 0 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 1,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = 0, .end = 0,
+		.min = 0, .max = 0,
+	},
+	/* segment 1 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 1,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = 0, .end = (1 << 0),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 2 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 2,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 0), .end = (1 << 1),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 3 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 2,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 1), .end = (1 << 2),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 4 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 2,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 2), .end = (1 << 3),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 5 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 2,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 3), .end = (1 << 4),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 6 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 4,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 4), .end = (1 << 5),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 7 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 4,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 5), .end = (1 << 6),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 8 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 4,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 6), .end = (1 << 7),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 9 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 8,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 7), .end = (1 << 8),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 10 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 8,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 8), .end = (1 << 9),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 11 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 8,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 9), .end = (1 << 10),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 12 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 16,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 10), .end = (1 << 11),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 13 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 16,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 11), .end = (1 << 12),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 14 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 16,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 12), .end = (1 << 13),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 15 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 32,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 13), .end = (1 << 14),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 16 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 32,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 14), .end = (1 << 15),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 17 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 64,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 15), .end = (1 << 16),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 18 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 64,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 16), .end = (1 << 17),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 19 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 64,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 17), .end = (1 << 18),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 20 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 32,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 18), .end = (1 << 19),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 21 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 32,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 19), .end = (1 << 20),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 22 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 32,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 20), .end = (1 << 21),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 23 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 32,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 21), .end = (1 << 22),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 24 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 32,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 22), .end = (1 << 23),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 3 aka. coarse segment / PAL_GC_MAX */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG | DRM_MODE_LUT_REUSE_LAST,
+		.count = 1,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 24), .end = (3 << 24),
+		.min = 0, .max = 1 << 16,
+	},
+	/* PAL_EXT_GC_MAX */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG | DRM_MODE_LUT_REUSE_LAST,
+		.count = 1,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (3 << 24), .end = (7 << 24),
+		.min = 0, .max = (8 << 16) - 1,
+	},
+	/* PAL_EXT2_GC_MAX */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG | DRM_MODE_LUT_REUSE_LAST,
+		.count = 1,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (7 << 24), .end = (7 << 24),
+		.min = 0, .max = (8 << 16) - 1,
+	},
+};
+
 void intel_color_init(struct intel_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -2118,14 +2350,24 @@ void intel_color_init(struct intel_crtc *crtc)
 			dev_priv->display.read_luts = i9xx_read_luts;
 		}
 	} else {
-		if (DISPLAY_VER(dev_priv) >= 11)
+		if (DISPLAY_VER(dev_priv) >= 13) {
+			dev_priv->display.color_check = icl_color_check;
+			drm_color_create_gamma_mode_property(&crtc->base, 2);
+			drm_color_add_gamma_mode_range(&crtc->base,
+						       "no gamma", NULL, 0);
+			drm_color_add_gamma_mode_range(&crtc->base,
+						       "logarithmic gamma",
+							d13_logarithmic_gamma,
+							sizeof(d13_logarithmic_gamma));
+		} else if (DISPLAY_VER(dev_priv) >= 11) {
 			dev_priv->display.color_check = icl_color_check;
-		else if (DISPLAY_VER(dev_priv) >= 10)
+		} else if (DISPLAY_VER(dev_priv) >= 10) {
 			dev_priv->display.color_check = glk_color_check;
-		else if (DISPLAY_VER(dev_priv) >= 7)
+		} else if (DISPLAY_VER(dev_priv) >= 7) {
 			dev_priv->display.color_check = ivb_color_check;
-		else
+		} else {
 			dev_priv->display.color_check = ilk_color_check;
+		}
 
 		if (DISPLAY_VER(dev_priv) >= 9)
 			dev_priv->display.color_commit = skl_color_commit;
-- 
2.26.2


WARNING: multiple messages have this Message-ID (diff)
From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 2/9] drm/i915/xelpd: Define color lut range structure
Date: Tue,  1 Jun 2021 16:11:28 +0530	[thread overview]
Message-ID: <20210601104135.29020-3-uma.shankar@intel.com> (raw)
In-Reply-To: <20210601104135.29020-1-uma.shankar@intel.com>

This defines the color lut ranges for logarithmic gamma which
is being introduced from XE_LPD onwards.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 250 ++++++++++++++++++++-
 1 file changed, 246 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index dab892d2251b..0b59d8a89761 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -2093,6 +2093,238 @@ static void icl_read_luts(struct intel_crtc_state *crtc_state)
 	}
 }
 
+#define D13_GAMMA_CAPABILITY_FLAG	(DRM_MODE_LUT_GAMMA | \
+					 DRM_MODE_LUT_REFLECT_NEGATIVE | \
+					 DRM_MODE_LUT_INTERPOLATE | \
+					 DRM_MODE_LUT_NON_DECREASING)
+ /* FIXME input bpc? */
+static const struct drm_color_lut_range d13_logarithmic_gamma[] = {
+	/* segment 0 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 1,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = 0, .end = 0,
+		.min = 0, .max = 0,
+	},
+	/* segment 1 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 1,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = 0, .end = (1 << 0),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 2 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 2,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 0), .end = (1 << 1),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 3 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 2,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 1), .end = (1 << 2),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 4 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 2,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 2), .end = (1 << 3),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 5 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 2,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 3), .end = (1 << 4),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 6 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 4,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 4), .end = (1 << 5),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 7 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 4,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 5), .end = (1 << 6),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 8 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 4,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 6), .end = (1 << 7),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 9 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 8,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 7), .end = (1 << 8),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 10 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 8,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 8), .end = (1 << 9),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 11 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 8,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 9), .end = (1 << 10),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 12 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 16,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 10), .end = (1 << 11),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 13 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 16,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 11), .end = (1 << 12),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 14 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 16,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 12), .end = (1 << 13),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 15 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 32,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 13), .end = (1 << 14),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 16 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 32,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 14), .end = (1 << 15),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 17 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 64,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 15), .end = (1 << 16),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 18 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 64,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 16), .end = (1 << 17),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 19 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 64,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 17), .end = (1 << 18),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 20 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 32,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 18), .end = (1 << 19),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 21 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 32,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 19), .end = (1 << 20),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 22 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 32,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 20), .end = (1 << 21),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 23 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 32,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 21), .end = (1 << 22),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 24 */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG,
+		.count = 32,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 22), .end = (1 << 23),
+		.min = 0, .max = (1 << 16) - 1,
+	},
+	/* segment 3 aka. coarse segment / PAL_GC_MAX */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG | DRM_MODE_LUT_REUSE_LAST,
+		.count = 1,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (1 << 24), .end = (3 << 24),
+		.min = 0, .max = 1 << 16,
+	},
+	/* PAL_EXT_GC_MAX */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG | DRM_MODE_LUT_REUSE_LAST,
+		.count = 1,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (3 << 24), .end = (7 << 24),
+		.min = 0, .max = (8 << 16) - 1,
+	},
+	/* PAL_EXT2_GC_MAX */
+	{
+		.flags = D13_GAMMA_CAPABILITY_FLAG | DRM_MODE_LUT_REUSE_LAST,
+		.count = 1,
+		.input_bpc = 24, .output_bpc = 16,
+		.start = (7 << 24), .end = (7 << 24),
+		.min = 0, .max = (8 << 16) - 1,
+	},
+};
+
 void intel_color_init(struct intel_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -2118,14 +2350,24 @@ void intel_color_init(struct intel_crtc *crtc)
 			dev_priv->display.read_luts = i9xx_read_luts;
 		}
 	} else {
-		if (DISPLAY_VER(dev_priv) >= 11)
+		if (DISPLAY_VER(dev_priv) >= 13) {
+			dev_priv->display.color_check = icl_color_check;
+			drm_color_create_gamma_mode_property(&crtc->base, 2);
+			drm_color_add_gamma_mode_range(&crtc->base,
+						       "no gamma", NULL, 0);
+			drm_color_add_gamma_mode_range(&crtc->base,
+						       "logarithmic gamma",
+							d13_logarithmic_gamma,
+							sizeof(d13_logarithmic_gamma));
+		} else if (DISPLAY_VER(dev_priv) >= 11) {
 			dev_priv->display.color_check = icl_color_check;
-		else if (DISPLAY_VER(dev_priv) >= 10)
+		} else if (DISPLAY_VER(dev_priv) >= 10) {
 			dev_priv->display.color_check = glk_color_check;
-		else if (DISPLAY_VER(dev_priv) >= 7)
+		} else if (DISPLAY_VER(dev_priv) >= 7) {
 			dev_priv->display.color_check = ivb_color_check;
-		else
+		} else {
 			dev_priv->display.color_check = ilk_color_check;
+		}
 
 		if (DISPLAY_VER(dev_priv) >= 9)
 			dev_priv->display.color_commit = skl_color_commit;
-- 
2.26.2

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  parent reply	other threads:[~2021-06-01 10:06 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-01 10:41 [PATCH 0/9] Enhance pipe color support for multi segmented luts Uma Shankar
2021-06-01 10:41 ` [Intel-gfx] " Uma Shankar
2021-06-01 10:41 ` [PATCH 1/9] drm: Add gamma mode property Uma Shankar
2021-06-01 10:41   ` [Intel-gfx] " Uma Shankar
2021-06-02  9:09   ` Pekka Paalanen
2021-06-02  9:09     ` [Intel-gfx] " Pekka Paalanen
2021-06-02 20:18     ` Shankar, Uma
2021-06-02 20:18       ` [Intel-gfx] " Shankar, Uma
2021-06-03  8:05       ` Pekka Paalanen
2021-06-03  8:05         ` [Intel-gfx] " Pekka Paalanen
2021-06-01 10:41 ` Uma Shankar [this message]
2021-06-01 10:41   ` [Intel-gfx] [PATCH 2/9] drm/i915/xelpd: Define color lut range structure Uma Shankar
2021-06-01 10:41 ` [PATCH 3/9] drm/i915/xelpd: Add support for Logarithmic gamma mode Uma Shankar
2021-06-01 10:41   ` [Intel-gfx] " Uma Shankar
2021-06-01 10:41 ` [PATCH 4/9] drm/i915/xelpd: Attach gamma mode property Uma Shankar
2021-06-01 10:41   ` [Intel-gfx] " Uma Shankar
2021-06-01 10:41 ` [PATCH 5/9] drm: Add Client Cap for advance gamma mode Uma Shankar
2021-06-01 10:41   ` [Intel-gfx] " Uma Shankar
2021-06-02  2:53   ` kernel test robot
2021-06-02  2:53     ` kernel test robot
2021-06-02  2:53     ` [Intel-gfx] " kernel test robot
2021-06-02  9:03   ` Pekka Paalanen
2021-06-02  9:03     ` [Intel-gfx] " Pekka Paalanen
2021-06-02 20:08     ` Shankar, Uma
2021-06-02 20:08       ` [Intel-gfx] " Shankar, Uma
2021-06-01 10:41 ` [PATCH 6/9] drm/i915/xelpd: logarithmic gamma enabled only with " Uma Shankar
2021-06-01 10:41   ` [Intel-gfx] " Uma Shankar
2021-06-01 10:41 ` [PATCH 7/9] drm/i915/xelpd: Enable Pipe Degamma Uma Shankar
2021-06-01 10:41   ` [Intel-gfx] " Uma Shankar
2021-06-01 10:41 ` [PATCH 8/9] drm/i915/xelpd: Add Pipe Color Lut caps to platform config Uma Shankar
2021-06-01 10:41   ` [Intel-gfx] " Uma Shankar
2021-06-01 10:41 ` [PATCH 9/9] drm/i915/xelpd: Enable XE_LPD Gamma Lut readout Uma Shankar
2021-06-01 10:41   ` [Intel-gfx] " Uma Shankar
2021-06-01 12:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enhance pipe color support for multi segmented luts Patchwork
2021-06-01 13:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-01 17:12 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-06-04 18:51 ` [PATCH 0/9] " Harry Wentland
2021-06-04 18:51   ` [Intel-gfx] " Harry Wentland
2021-06-07  7:29   ` Pekka Paalanen
2021-06-07  7:29     ` [Intel-gfx] " Pekka Paalanen
2021-06-07 18:07     ` Shankar, Uma
2021-06-07 18:07       ` [Intel-gfx] " Shankar, Uma
2021-06-08  7:59       ` Pekka Paalanen
2021-06-08  7:59         ` [Intel-gfx] " Pekka Paalanen
2021-06-07 18:01   ` Shankar, Uma
2021-06-07 18:01     ` [Intel-gfx] " Shankar, Uma
2021-06-07 21:00     ` Harry Wentland
2021-06-07 21:00       ` [Intel-gfx] " Harry Wentland

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