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From: Alexandre Ghiti <alex@ghiti.fr>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Jisheng Zhang <jszhang@kernel.org>,
	Christoph Hellwig <hch@infradead.org>,
	Zong Li <zong.li@sifive.com>, Anup Patel <anup@brainfault.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Alexandre Ghiti <alex@ghiti.fr>
Subject: [PATCH v4 1/4] riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED
Date: Fri,  4 Jun 2021 13:49:47 +0200	[thread overview]
Message-ID: <20210604114950.1446390-2-alex@ghiti.fr> (raw)
In-Reply-To: <20210604114950.1446390-1-alex@ghiti.fr>

Make the physical RAM base address available for all kernels, not only
XIP kernels as it will allow to simplify address conversions macros.

Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
---
 arch/riscv/Kconfig | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index b58596b141fc..3d8e7e4bb45c 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -493,13 +493,8 @@ config STACKPROTECTOR_PER_TASK
 	def_bool y
 	depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS
 
-config PHYS_RAM_BASE_FIXED
-	bool "Explicitly specified physical RAM address"
-	default n
-
 config PHYS_RAM_BASE
 	hex "Platform Physical RAM address"
-	depends on PHYS_RAM_BASE_FIXED
 	default "0x80000000"
 	help
 	  This is the physical address of RAM in the system. It has to be
@@ -512,7 +507,6 @@ config XIP_KERNEL
 	# This prevents XIP from being enabled by all{yes,mod}config, which
 	# fail to build since XIP doesn't support large kernels.
 	depends on !COMPILE_TEST
-	select PHYS_RAM_BASE_FIXED
 	help
 	  Execute-In-Place allows the kernel to run from non-volatile storage
 	  directly addressable by the CPU, such as NOR flash. This saves RAM
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Alexandre Ghiti <alex@ghiti.fr>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Jisheng Zhang <jszhang@kernel.org>,
	Christoph Hellwig <hch@infradead.org>,
	Zong Li <zong.li@sifive.com>, Anup Patel <anup@brainfault.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Alexandre Ghiti <alex@ghiti.fr>
Subject: [PATCH v4 1/4] riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED
Date: Fri,  4 Jun 2021 13:49:47 +0200	[thread overview]
Message-ID: <20210604114950.1446390-2-alex@ghiti.fr> (raw)
In-Reply-To: <20210604114950.1446390-1-alex@ghiti.fr>

Make the physical RAM base address available for all kernels, not only
XIP kernels as it will allow to simplify address conversions macros.

Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
---
 arch/riscv/Kconfig | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index b58596b141fc..3d8e7e4bb45c 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -493,13 +493,8 @@ config STACKPROTECTOR_PER_TASK
 	def_bool y
 	depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS
 
-config PHYS_RAM_BASE_FIXED
-	bool "Explicitly specified physical RAM address"
-	default n
-
 config PHYS_RAM_BASE
 	hex "Platform Physical RAM address"
-	depends on PHYS_RAM_BASE_FIXED
 	default "0x80000000"
 	help
 	  This is the physical address of RAM in the system. It has to be
@@ -512,7 +507,6 @@ config XIP_KERNEL
 	# This prevents XIP from being enabled by all{yes,mod}config, which
 	# fail to build since XIP doesn't support large kernels.
 	depends on !COMPILE_TEST
-	select PHYS_RAM_BASE_FIXED
 	help
 	  Execute-In-Place allows the kernel to run from non-volatile storage
 	  directly addressable by the CPU, such as NOR flash. This saves RAM
-- 
2.30.2


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2021-06-04 11:51 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-04 11:49 [PATCH v4 0/4] riscv: Map the kernel with correct permissions the first time Alexandre Ghiti
2021-06-04 11:49 ` Alexandre Ghiti
2021-06-04 11:49 ` Alexandre Ghiti [this message]
2021-06-04 11:49   ` [PATCH v4 1/4] riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED Alexandre Ghiti
2021-06-12 23:23   ` Emil Renner Berthing
2021-06-12 23:23     ` Emil Renner Berthing
2021-06-13  0:23     ` Palmer Dabbelt
2021-06-13  0:23       ` Palmer Dabbelt
2021-06-13  0:44       ` Jisheng Zhang
2021-06-13  0:44         ` Jisheng Zhang
2021-06-13  6:14         ` Alex Ghiti
2021-06-13  6:14           ` Alex Ghiti
2021-06-04 11:49 ` [PATCH v4 2/4] riscv: Simplify xip and !xip kernel address conversion macros Alexandre Ghiti
2021-06-04 11:49   ` Alexandre Ghiti
2021-06-04 12:47   ` Jisheng Zhang
2021-06-04 12:47     ` Jisheng Zhang
2021-06-06  7:38     ` Alex Ghiti
2021-06-06  7:38       ` Alex Ghiti
2021-06-04 11:49 ` [PATCH v4 3/4] riscv: Introduce set_kernel_memory helper Alexandre Ghiti
2021-06-04 11:49   ` Alexandre Ghiti
2021-06-04 11:49 ` [PATCH v4 4/4] riscv: Map the kernel with correct permissions the first time Alexandre Ghiti
2021-06-04 11:49   ` Alexandre Ghiti
2021-06-12  3:55 ` [PATCH v4 0/4] " Palmer Dabbelt
2021-06-12  3:55   ` Palmer Dabbelt

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