From: Jon Lin <jon.lin@rock-chips.com>
To: linux-spi@vger.kernel.org
Cc: jon.lin@rock-chips.com, broonie@kernel.org, robh+dt@kernel.org,
heiko@sntech.de, jbx6244@gmail.com, hjc@rock-chips.com,
yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com,
linux-rockchip@lists.infradead.org,
linux-mtd@lists.infradead.org, p.yadav@ti.com,
macroalpha82@gmail.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, mturquette@baylibre.com,
sboyd@kernel.org, linux-clk@vger.kernel.org,
Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH v7 8/9] arm64: dts: rockchip: Add SFC to RK3308
Date: Wed, 9 Jun 2021 22:13:47 +0800 [thread overview]
Message-ID: <20210609141348.19178-4-jon.lin@rock-chips.com> (raw)
In-Reply-To: <20210609141348.19178-1-jon.lin@rock-chips.com>
From: Chris Morgan <macromorgan@hotmail.com>
Add a devicetree entry for the Rockchip SFC for the RK3308 SOC.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
Changes in v1: None
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 37 ++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 0c5fa9801e6f..cb8d96235986 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -637,6 +637,17 @@
status = "disabled";
};
+ sfc: spi@ff4c0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x0 0xff4c0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+ clock-names = "clk_sfc", "hclk_sfc";
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
cru: clock-controller@ff500000 {
compatible = "rockchip,rk3308-cru";
reg = <0x0 0xff500000 0x0 0x1000>;
@@ -910,6 +921,32 @@
};
};
+ sfc {
+ sfc_bus4: sfc-bus4 {
+ rockchip,pins =
+ <3 RK_PA0 3 &pcfg_pull_none>,
+ <3 RK_PA1 3 &pcfg_pull_none>,
+ <3 RK_PA2 3 &pcfg_pull_none>,
+ <3 RK_PA3 3 &pcfg_pull_none>;
+ };
+
+ sfc_bus2: sfc-bus2 {
+ rockchip,pins =
+ <3 RK_PA0 3 &pcfg_pull_none>,
+ <3 RK_PA1 3 &pcfg_pull_none>;
+ };
+
+ sfc_cs0: sfc-cs0 {
+ rockchip,pins =
+ <3 RK_PA4 3 &pcfg_pull_none>;
+ };
+
+ sfc_clk: sfc-clk {
+ rockchip,pins =
+ <3 RK_PA5 3 &pcfg_pull_none>;
+ };
+ };
+
gmac {
rmii_pins: rmii-pins {
rockchip,pins =
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Jon Lin <jon.lin@rock-chips.com>
To: linux-spi@vger.kernel.org
Cc: jon.lin@rock-chips.com, broonie@kernel.org, robh+dt@kernel.org,
heiko@sntech.de, jbx6244@gmail.com, hjc@rock-chips.com,
yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com,
linux-rockchip@lists.infradead.org,
linux-mtd@lists.infradead.org, p.yadav@ti.com,
macroalpha82@gmail.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, mturquette@baylibre.com,
sboyd@kernel.org, linux-clk@vger.kernel.org,
Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH v7 8/9] arm64: dts: rockchip: Add SFC to RK3308
Date: Wed, 9 Jun 2021 22:13:47 +0800 [thread overview]
Message-ID: <20210609141348.19178-4-jon.lin@rock-chips.com> (raw)
In-Reply-To: <20210609141348.19178-1-jon.lin@rock-chips.com>
From: Chris Morgan <macromorgan@hotmail.com>
Add a devicetree entry for the Rockchip SFC for the RK3308 SOC.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
Changes in v1: None
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 37 ++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 0c5fa9801e6f..cb8d96235986 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -637,6 +637,17 @@
status = "disabled";
};
+ sfc: spi@ff4c0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x0 0xff4c0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+ clock-names = "clk_sfc", "hclk_sfc";
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
cru: clock-controller@ff500000 {
compatible = "rockchip,rk3308-cru";
reg = <0x0 0xff500000 0x0 0x1000>;
@@ -910,6 +921,32 @@
};
};
+ sfc {
+ sfc_bus4: sfc-bus4 {
+ rockchip,pins =
+ <3 RK_PA0 3 &pcfg_pull_none>,
+ <3 RK_PA1 3 &pcfg_pull_none>,
+ <3 RK_PA2 3 &pcfg_pull_none>,
+ <3 RK_PA3 3 &pcfg_pull_none>;
+ };
+
+ sfc_bus2: sfc-bus2 {
+ rockchip,pins =
+ <3 RK_PA0 3 &pcfg_pull_none>,
+ <3 RK_PA1 3 &pcfg_pull_none>;
+ };
+
+ sfc_cs0: sfc-cs0 {
+ rockchip,pins =
+ <3 RK_PA4 3 &pcfg_pull_none>;
+ };
+
+ sfc_clk: sfc-clk {
+ rockchip,pins =
+ <3 RK_PA5 3 &pcfg_pull_none>;
+ };
+ };
+
gmac {
rmii_pins: rmii-pins {
rockchip,pins =
--
2.17.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Jon Lin <jon.lin@rock-chips.com>
To: linux-spi@vger.kernel.org
Cc: jon.lin@rock-chips.com, broonie@kernel.org, robh+dt@kernel.org,
heiko@sntech.de, jbx6244@gmail.com, hjc@rock-chips.com,
yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com,
linux-rockchip@lists.infradead.org,
linux-mtd@lists.infradead.org, p.yadav@ti.com,
macroalpha82@gmail.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, mturquette@baylibre.com,
sboyd@kernel.org, linux-clk@vger.kernel.org,
Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH v7 8/9] arm64: dts: rockchip: Add SFC to RK3308
Date: Wed, 9 Jun 2021 22:13:47 +0800 [thread overview]
Message-ID: <20210609141348.19178-4-jon.lin@rock-chips.com> (raw)
In-Reply-To: <20210609141348.19178-1-jon.lin@rock-chips.com>
From: Chris Morgan <macromorgan@hotmail.com>
Add a devicetree entry for the Rockchip SFC for the RK3308 SOC.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
Changes in v1: None
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 37 ++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 0c5fa9801e6f..cb8d96235986 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -637,6 +637,17 @@
status = "disabled";
};
+ sfc: spi@ff4c0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x0 0xff4c0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+ clock-names = "clk_sfc", "hclk_sfc";
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
cru: clock-controller@ff500000 {
compatible = "rockchip,rk3308-cru";
reg = <0x0 0xff500000 0x0 0x1000>;
@@ -910,6 +921,32 @@
};
};
+ sfc {
+ sfc_bus4: sfc-bus4 {
+ rockchip,pins =
+ <3 RK_PA0 3 &pcfg_pull_none>,
+ <3 RK_PA1 3 &pcfg_pull_none>,
+ <3 RK_PA2 3 &pcfg_pull_none>,
+ <3 RK_PA3 3 &pcfg_pull_none>;
+ };
+
+ sfc_bus2: sfc-bus2 {
+ rockchip,pins =
+ <3 RK_PA0 3 &pcfg_pull_none>,
+ <3 RK_PA1 3 &pcfg_pull_none>;
+ };
+
+ sfc_cs0: sfc-cs0 {
+ rockchip,pins =
+ <3 RK_PA4 3 &pcfg_pull_none>;
+ };
+
+ sfc_clk: sfc-clk {
+ rockchip,pins =
+ <3 RK_PA5 3 &pcfg_pull_none>;
+ };
+ };
+
gmac {
rmii_pins: rmii-pins {
rockchip,pins =
--
2.17.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Jon Lin <jon.lin@rock-chips.com>
To: linux-spi@vger.kernel.org
Cc: jon.lin@rock-chips.com, broonie@kernel.org, robh+dt@kernel.org,
heiko@sntech.de, jbx6244@gmail.com, hjc@rock-chips.com,
yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com,
linux-rockchip@lists.infradead.org,
linux-mtd@lists.infradead.org, p.yadav@ti.com,
macroalpha82@gmail.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, mturquette@baylibre.com,
sboyd@kernel.org, linux-clk@vger.kernel.org,
Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH v7 8/9] arm64: dts: rockchip: Add SFC to RK3308
Date: Wed, 9 Jun 2021 22:13:47 +0800 [thread overview]
Message-ID: <20210609141348.19178-4-jon.lin@rock-chips.com> (raw)
In-Reply-To: <20210609141348.19178-1-jon.lin@rock-chips.com>
From: Chris Morgan <macromorgan@hotmail.com>
Add a devicetree entry for the Rockchip SFC for the RK3308 SOC.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
Changes in v1: None
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 37 ++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 0c5fa9801e6f..cb8d96235986 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -637,6 +637,17 @@
status = "disabled";
};
+ sfc: spi@ff4c0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x0 0xff4c0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+ clock-names = "clk_sfc", "hclk_sfc";
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
cru: clock-controller@ff500000 {
compatible = "rockchip,rk3308-cru";
reg = <0x0 0xff500000 0x0 0x1000>;
@@ -910,6 +921,32 @@
};
};
+ sfc {
+ sfc_bus4: sfc-bus4 {
+ rockchip,pins =
+ <3 RK_PA0 3 &pcfg_pull_none>,
+ <3 RK_PA1 3 &pcfg_pull_none>,
+ <3 RK_PA2 3 &pcfg_pull_none>,
+ <3 RK_PA3 3 &pcfg_pull_none>;
+ };
+
+ sfc_bus2: sfc-bus2 {
+ rockchip,pins =
+ <3 RK_PA0 3 &pcfg_pull_none>,
+ <3 RK_PA1 3 &pcfg_pull_none>;
+ };
+
+ sfc_cs0: sfc-cs0 {
+ rockchip,pins =
+ <3 RK_PA4 3 &pcfg_pull_none>;
+ };
+
+ sfc_clk: sfc-clk {
+ rockchip,pins =
+ <3 RK_PA5 3 &pcfg_pull_none>;
+ };
+ };
+
gmac {
rmii_pins: rmii-pins {
rockchip,pins =
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-06-09 14:14 UTC|newest]
Thread overview: 86+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-09 14:04 [PATCH v7 0/9] Add Rockchip SFC(serial flash controller) support Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 14:04 ` [PATCH v7 1/9] dt-bindings: rockchip-sfc: Bindings for Rockchip serial flash controller Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 16:16 ` Rob Herring
2021-06-09 16:16 ` Rob Herring
2021-06-09 16:16 ` Rob Herring
2021-06-09 16:16 ` Rob Herring
2021-06-10 2:43 ` Rob Herring
2021-06-10 2:43 ` Rob Herring
2021-06-10 2:43 ` Rob Herring
2021-06-10 2:43 ` Rob Herring
2021-06-10 3:02 ` Kever Yang
2021-06-10 3:02 ` Kever Yang
2021-06-10 3:02 ` Kever Yang
2021-06-10 3:02 ` Kever Yang
2021-06-11 16:32 ` Ezequiel Garcia
2021-06-11 16:32 ` Ezequiel Garcia
2021-06-11 16:32 ` Ezequiel Garcia
2021-06-11 16:32 ` Ezequiel Garcia
2021-06-16 15:38 ` Rob Herring
2021-06-16 15:38 ` Rob Herring
2021-06-16 15:38 ` Rob Herring
2021-06-16 15:38 ` Rob Herring
2021-06-17 1:51 ` Kever Yang
2021-06-17 1:51 ` Kever Yang
2021-06-17 1:51 ` Kever Yang
2021-06-17 1:51 ` Kever Yang
2021-06-09 14:04 ` [PATCH v7 2/9] spi: rockchip-sfc: add rockchip " Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 18:45 ` Chris Morgan
2021-06-09 18:45 ` Chris Morgan
2021-06-09 18:45 ` Chris Morgan
2021-06-09 18:45 ` Chris Morgan
2021-06-09 14:04 ` [PATCH v7 3/9] arm64: dts: rockchip: Add SFC to PX30 Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 14:04 ` [PATCH v7 4/9] clk: rockchip: rk3036: fix up the sclk_sfc parent error Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 14:04 ` Jon Lin
2021-06-09 14:13 ` [PATCH v7 5/9] clk: rockchip: Add support for hclk_sfc on rk3036 Jon Lin
2021-06-09 14:13 ` Jon Lin
2021-06-09 14:13 ` Jon Lin
2021-06-09 14:13 ` Jon Lin
2021-06-09 14:13 ` [PATCH v7 6/9] arm: dts: rockchip: Add SFC to RK3036 Jon Lin
2021-06-09 14:13 ` Jon Lin
2021-06-09 14:13 ` Jon Lin
2021-06-09 14:13 ` Jon Lin
2021-06-09 14:13 ` [PATCH v7 7/9] arm: dts: rockchip: Add SFC to RV1108 Jon Lin
2021-06-09 14:13 ` Jon Lin
2021-06-09 14:13 ` Jon Lin
2021-06-09 14:13 ` Jon Lin
2021-06-09 14:13 ` Jon Lin [this message]
2021-06-09 14:13 ` [PATCH v7 8/9] arm64: dts: rockchip: Add SFC to RK3308 Jon Lin
2021-06-09 14:13 ` Jon Lin
2021-06-09 14:13 ` Jon Lin
2021-06-09 14:13 ` [PATCH v7 9/9] arm64: dts: rockchip: Enable SFC for Odroid Go Advance Jon Lin
2021-06-09 14:13 ` Jon Lin
2021-06-09 14:13 ` Jon Lin
2021-06-09 14:13 ` Jon Lin
2021-06-10 17:36 ` Chris Morgan
2021-06-10 17:36 ` Chris Morgan
2021-06-10 17:36 ` Chris Morgan
2021-06-10 17:36 ` Chris Morgan
2021-06-11 2:26 ` Jon Lin
2021-06-11 2:26 ` Jon Lin
2021-06-11 2:26 ` Jon Lin
2021-06-11 2:26 ` Jon Lin
2021-06-11 3:38 ` Chris Morgan
2021-06-11 3:38 ` Chris Morgan
2021-06-11 3:38 ` Chris Morgan
2021-06-11 3:54 ` Jon Lin
2021-06-11 3:54 ` Jon Lin
2021-06-11 3:54 ` Jon Lin
2021-06-11 3:54 ` Jon Lin
2021-06-11 14:08 ` Chris Morgan
2021-06-11 14:08 ` Chris Morgan
2021-06-11 14:08 ` Chris Morgan
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