From: Heiko Stuebner <heiko@sntech.de> To: kishon@ti.com, vkoul@kernel.org Cc: robh+dt@kernel.org, heiko@sntech.de, ezequiel@collabora.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, Heiko Stuebner <heiko.stuebner@theobroma-systems.com>, Rob Herring <robh@kernel.org> Subject: [PATCH v2 1/2] dt-bindings: phy: add yaml binding for rockchip-inno-csi-dphy Date: Thu, 10 Jun 2021 23:29:34 +0200 [thread overview] Message-ID: <20210610212935.3520341-2-heiko@sntech.de> (raw) In-Reply-To: <20210610212935.3520341-1-heiko@sntech.de> From: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Some Rockchip SoCs like the rk3368, rk3326, px30 use a CSI dphy based on an Innosilicon IP. Add a binding for them. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Rob Herring <robh@kernel.org> --- .../bindings/phy/rockchip-inno-csi-dphy.yaml | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml diff --git a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml new file mode 100644 index 000000000000..bb4a2e4b8ab0 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/rockchip-inno-csi-dphy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings + +maintainers: + - Heiko Stuebner <heiko@sntech.de> + +description: | + The Rockchip SoC has a MIPI CSI D-PHY based on an Innosilicon IP wich + connects to the ISP1 (Image Signal Processing unit v1.0) for CSI cameras. + +properties: + compatible: + enum: + - rockchip,px30-csi-dphy + - rockchip,rk1808-csi-dphy + - rockchip,rk3326-csi-dphy + - rockchip,rk3368-csi-dphy + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: pclk + + '#phy-cells': + const: 0 + + power-domains: + description: Video in/out power domain. + maxItems: 1 + + resets: + items: + - description: exclusive PHY reset line + + reset-names: + items: + - const: apb + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Some additional phy settings are access through GRF regs. + +required: + - compatible + - reg + - clocks + - clock-names + - '#phy-cells' + - power-domains + - resets + - reset-names + - rockchip,grf + +additionalProperties: false + +examples: + - | + + csi_dphy: phy@ff2f0000 { + compatible = "rockchip,px30-csi-dphy"; + reg = <0xff2f0000 0x4000>; + clocks = <&cru 1>; + clock-names = "pclk"; + #phy-cells = <0>; + power-domains = <&power 1>; + resets = <&cru 1>; + reset-names = "apb"; + rockchip,grf = <&grf>; + }; -- 2.29.2
WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de> To: kishon@ti.com, vkoul@kernel.org Cc: robh+dt@kernel.org, heiko@sntech.de, ezequiel@collabora.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, Heiko Stuebner <heiko.stuebner@theobroma-systems.com>, Rob Herring <robh@kernel.org> Subject: [PATCH v2 1/2] dt-bindings: phy: add yaml binding for rockchip-inno-csi-dphy Date: Thu, 10 Jun 2021 23:29:34 +0200 [thread overview] Message-ID: <20210610212935.3520341-2-heiko@sntech.de> (raw) In-Reply-To: <20210610212935.3520341-1-heiko@sntech.de> From: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Some Rockchip SoCs like the rk3368, rk3326, px30 use a CSI dphy based on an Innosilicon IP. Add a binding for them. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Rob Herring <robh@kernel.org> --- .../bindings/phy/rockchip-inno-csi-dphy.yaml | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml diff --git a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml new file mode 100644 index 000000000000..bb4a2e4b8ab0 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/rockchip-inno-csi-dphy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings + +maintainers: + - Heiko Stuebner <heiko@sntech.de> + +description: | + The Rockchip SoC has a MIPI CSI D-PHY based on an Innosilicon IP wich + connects to the ISP1 (Image Signal Processing unit v1.0) for CSI cameras. + +properties: + compatible: + enum: + - rockchip,px30-csi-dphy + - rockchip,rk1808-csi-dphy + - rockchip,rk3326-csi-dphy + - rockchip,rk3368-csi-dphy + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: pclk + + '#phy-cells': + const: 0 + + power-domains: + description: Video in/out power domain. + maxItems: 1 + + resets: + items: + - description: exclusive PHY reset line + + reset-names: + items: + - const: apb + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Some additional phy settings are access through GRF regs. + +required: + - compatible + - reg + - clocks + - clock-names + - '#phy-cells' + - power-domains + - resets + - reset-names + - rockchip,grf + +additionalProperties: false + +examples: + - | + + csi_dphy: phy@ff2f0000 { + compatible = "rockchip,px30-csi-dphy"; + reg = <0xff2f0000 0x4000>; + clocks = <&cru 1>; + clock-names = "pclk"; + #phy-cells = <0>; + power-domains = <&power 1>; + resets = <&cru 1>; + reset-names = "apb"; + rockchip,grf = <&grf>; + }; -- 2.29.2 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2021-06-10 21:29 UTC|newest] Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-10 21:29 [PATCH v2 0/2] phy: rockchip: add Innosilicon-based CSI DPHY Heiko Stuebner 2021-06-10 21:29 ` Heiko Stuebner 2021-06-10 21:29 ` Heiko Stuebner [this message] 2021-06-10 21:29 ` [PATCH v2 1/2] dt-bindings: phy: add yaml binding for rockchip-inno-csi-dphy Heiko Stuebner 2021-06-10 21:29 ` [PATCH v2 2/2] phy/rockchip: add Innosilicon-based CSI dphy Heiko Stuebner 2021-06-10 21:29 ` Heiko Stuebner 2021-06-21 3:56 ` [PATCH v2 0/2] phy: rockchip: add Innosilicon-based CSI DPHY Vinod Koul 2021-06-21 3:56 ` Vinod Koul
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