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From: "Martin Hundebøll" <mhu@silicom.dk>
To: Wu Hao <hao.wu@intel.com>, Tom Rix <trix@redhat.com>,
	Moritz Fischer <mdf@kernel.org>, Xu Yilun <yilun.xu@intel.com>,
	Jean Delvare <jdelvare@suse.com>,
	Guenter Roeck <linux@roeck-us.net>,
	Lee Jones <lee.jones@linaro.org>, Mark Brown <broonie@kernel.org>
Cc: "Martin Hundebøll" <mhu@geanix.com>,
	linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-hwmon@vger.kernel.org, linux-spi@vger.kernel.org,
	"Martin Hundebøll" <mhu@silicom.dk>
Subject: [PATCH 1/4] fpga: dfl: pci: add device IDs for Silicom N501x PAC cards
Date: Mon, 21 Jun 2021 09:06:18 +0200	[thread overview]
Message-ID: <20210621070621.431482-2-mhu@silicom.dk> (raw)
In-Reply-To: <20210621070621.431482-1-mhu@silicom.dk>

This adds the approved PCI Express Device IDs for the
Silicom PAC N5010 and N5011 cards.

Signed-off-by: Martin Hundebøll <mhu@silicom.dk>
---
 drivers/fpga/dfl-pci.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
index b44523ea8c91..4d68719e608f 100644
--- a/drivers/fpga/dfl-pci.c
+++ b/drivers/fpga/dfl-pci.c
@@ -74,6 +74,9 @@ static void cci_pci_free_irq(struct pci_dev *pcidev)
 #define PCIE_DEVICE_ID_PF_DSC_1_X		0x09C4
 #define PCIE_DEVICE_ID_INTEL_PAC_N3000		0x0B30
 #define PCIE_DEVICE_ID_INTEL_PAC_D5005		0x0B2B
+#define PCIE_DEVICE_ID_SILICOM_PAC_N5010	0x1000
+#define PCIE_DEVICE_ID_SILICOM_PAC_N5011	0x1001
+
 /* VF Device */
 #define PCIE_DEVICE_ID_VF_INT_5_X		0xBCBF
 #define PCIE_DEVICE_ID_VF_INT_6_X		0xBCC1
@@ -90,6 +93,8 @@ static struct pci_device_id cci_pcie_id_tbl[] = {
 	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_N3000),},
 	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005),},
 	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),},
+	{PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),},
+	{PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),},
 	{0,}
 };
 MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl);
-- 
2.31.0


  reply	other threads:[~2021-06-21  7:06 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-21  7:06 [PATCH 0/4] fpga/mfd/hwmon: Initial support for Silicom N5010 PAC Martin Hundebøll
2021-06-21  7:06 ` Martin Hundebøll [this message]
2021-06-21  9:57   ` [PATCH 1/4] fpga: dfl: pci: add device IDs for Silicom N501x PAC cards Wu, Hao
2021-06-21  7:06 ` [PATCH 2/4] fpga: dfl: Move DFH header register macros to linux/dfl.h Martin Hundebøll
2021-06-21 10:19   ` Wu, Hao
2021-06-22  5:22     ` Xu Yilun
2021-06-22  7:39       ` Wu, Hao
2021-06-23 11:56         ` Martin Hundebøll
2021-06-24  3:01           ` Xu Yilun
2021-06-24  4:45             ` Wu, Hao
2021-06-21 13:56   ` Tom Rix
2021-06-22  4:56     ` Xu Yilun
2021-06-22 12:31       ` Tom Rix
2021-06-23  6:37         ` Xu Yilun
2021-06-23 11:44     ` Martin Hundebøll
2021-06-23 13:38       ` Tom Rix
2021-06-21 19:33   ` kernel test robot
2021-06-21 19:33     ` kernel test robot
2021-06-21  7:06 ` [PATCH 3/4] spi: spi-altera-dfl: support n5010 feature revision Martin Hundebøll
2021-06-21  7:06 ` [PATCH 4/4] hwmon: intel-m10-bmc: add sensor support for Silicom N5010 card Martin Hundebøll
2021-06-21  8:55   ` Lee Jones
2021-06-21  8:38 ` [PATCH 0/4] fpga/mfd/hwmon: Initial support for Silicom N5010 PAC Xu Yilun
2021-06-25  7:11   ` Martin Hundebøll

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